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Title: clock-switch Download
 Description: I have written to synchronize asynchronous transfer clock switch, the system can be switched to run between two clock sources.
 Downloaders recently: [More information of uploader 朱晖]
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clock switch
............\bat
............\...\auto_sim.bat
............\...\inca_libs
............\...\.........\.ncv.lock
............\...\.........\cds.lib
............\...\.........\hdl.var
............\...\.........\snap.nc
............\...\.........\.......\.elab.args
............\...\.........\.......\.hard.args
............\...\.........\.......\.ncv.lock
............\...\.........\.......\.vlog.args
............\...\.........\.......\bind.lst
............\...\.........\.......\cds.lib
............\...\.........\.......\hdl.var
............\...\.........\.......\ncxlmode.args
............\...\.........\worklib
............\...\.........\.......\.cdsvmod
............\...\.........\.......\.inca.db.151.win32
............\...\.........\.......\cdsinfo.tag
............\...\.........\.......\inca.win32.151.pak
............\...\ncxlmode.log
............\fsdb
............\....\clk_sw.fsdb
............\lib
............\...\lib_all.f
............\...\lib_all.f.bak
............\rtl
............\...\altera_IP
............\...\.........\220model.v
............\...\.........\altera_mf.v
............\...\.........\cycloneii_atoms.v
............\...\.........\cycloneive_atoms.v
............\...\.........\cycloneiv_atoms.v
............\...\.........\cyclone_atoms.v
............\...\clock_switch.v
............\...\clock_switch.v.bak
............\...\PLL
............\...\...\PLL4.v
............\...\...\PLL4.v.bak
............\...\...\PLL4_bb.v
............\tb
............\..\clk_sw_tb.v
............\..\clk_sw_tb.v.bak
    

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