- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 1kb
- Update:
- 2014-03-29
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- 0 Times
- Uploaded by:
- 杨空
Description:
Multiplexing logic signal- digital signal converter. The number of input and output ports can be modified according to this document.
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helu.vhd
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