- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 1kb
- Update:
- 2014-03-30
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- Uploaded by:
- 东城
Description: Trigger-based VHDL design.
Consists of a level-triggered D flip-flops up and down the edge of the trigger.
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Dlatch3.vhd
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