- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 304kb
- Update:
- 2014-04-13
- Downloads:
- 0 Times
- Uploaded by:
- 李媛媛
Description: Digital system design, simulation library scene, using VHDL complete the appropriate corresponding function library
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tushuguan
.........\cmp_state.ini
.........\db
.........\..\tushuguan.cbx.xml
.........\..\tushuguan.cmp.cdb
.........\..\tushuguan.cmp.hdb
.........\..\tushuguan.cmp.rdb
.........\..\tushuguan.db_info
.........\..\tushuguan.eco.cdb
.........\..\tushuguan.fit.qmsg
.........\..\tushuguan.hier_info
.........\..\tushuguan.hif
.........\..\tushuguan.map.cdb
.........\..\tushuguan.map.hdb
.........\..\tushuguan.map.qmsg
.........\..\tushuguan.pre_map.cdb
.........\..\tushuguan.pre_map.hdb
.........\..\tushuguan.psp
.........\..\tushuguan.rtlv.hdb
.........\..\tushuguan.rtlv_sg.cdb
.........\..\tushuguan.rtlv_sg_swap.cdb
.........\..\tushuguan.sgdiff.cdb
.........\..\tushuguan.sgdiff.hdb
.........\..\tushuguan.signalprobe.cdb
.........\..\tushuguan.sld_design_entry.sci
.........\..\tushuguan.sld_design_entry_dsc.sci
.........\..\tushuguan.syn_hier_info
.........\..\tushuguan_cmp.qrpt
.........\FenPin.bsf
.........\fenpin.vhd
.........\key.vhd
.........\Key_4X4.bsf
.........\leadin.bsf
.........\leadin.vhd
.........\time.vhd
.........\timeco.bsf
.........\tushuguan.bdf
.........\tushuguan.done
.........\tushuguan.fit.eqn
.........\tushuguan.fit.rpt
.........\tushuguan.fit.summary
.........\tushuguan.flow.rpt
.........\tushuguan.map.eqn
.........\tushuguan.map.rpt
.........\tushuguan.map.summary
.........\tushuguan.pin
.........\tushuguan.qpf
.........\tushuguan.qsf
.........\tushuguan.qws
.........\xiaodou.vhd
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