Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: tiaobianxinhao Download
 Description: Use of the short gate delay time difference between the pulse signals generated as a signal to trigger the transition of data collection. .
 Downloaders recently: [More information of uploader 王彦东]
 To Search:
File list (Check if you may need any files):
 

双上升沿触发跳变信号
....................\clk_gate.asm.rpt
....................\clk_gate.bdf
....................\clk_gate.done
....................\clk_gate.fit.rpt
....................\clk_gate.fit.smsg
....................\clk_gate.fit.summary
....................\clk_gate.flow.rpt
....................\clk_gate.map.rpt
....................\clk_gate.map.summary
....................\clk_gate.pin
....................\clk_gate.qpf
....................\clk_gate.qsf
....................\clk_gate.qws
....................\clk_gate.sim.rpt
....................\clk_gate.sof
....................\clk_gate.tan.rpt
....................\clk_gate.tan.summary
....................\clk_gate.vwf
....................\D.bdf
....................\D.vwf
....................\db
....................\..\clk_gate.asm.qmsg
....................\..\clk_gate.asm.rdb
....................\..\clk_gate.cbx.xml
....................\..\clk_gate.cmp.bpm
....................\..\clk_gate.cmp.cdb
....................\..\clk_gate.cmp.ecobp
....................\..\clk_gate.cmp.hdb
....................\..\clk_gate.cmp.kpt
....................\..\clk_gate.cmp.logdb
....................\..\clk_gate.cmp.rdb
....................\..\clk_gate.cmp.tdb
....................\..\clk_gate.cmp0.ddb
....................\..\clk_gate.cmp_merge.kpt
....................\..\clk_gate.db_info
....................\..\clk_gate.eco.cdb
....................\..\clk_gate.eds_overflow
....................\..\clk_gate.fit.qmsg
....................\..\clk_gate.fnsim.hdb
....................\..\clk_gate.fnsim.qmsg
....................\..\clk_gate.hier_info
....................\..\clk_gate.hif
....................\..\clk_gate.lpc.html
....................\..\clk_gate.lpc.rdb
....................\..\clk_gate.lpc.txt
....................\..\clk_gate.map.bpm
....................\..\clk_gate.map.cdb
....................\..\clk_gate.map.ecobp
....................\..\clk_gate.map.hdb
....................\..\clk_gate.map.kpt
....................\..\clk_gate.map.logdb
....................\..\clk_gate.map.qmsg
....................\..\clk_gate.map_bb.cdb
....................\..\clk_gate.map_bb.hdb
....................\..\clk_gate.map_bb.logdb
....................\..\clk_gate.pre_map.cdb
....................\..\clk_gate.pre_map.hdb
....................\..\clk_gate.rtlv.hdb
....................\..\clk_gate.rtlv_sg.cdb
....................\..\clk_gate.rtlv_sg_swap.cdb
....................\..\clk_gate.sgdiff.cdb
....................\..\clk_gate.sgdiff.hdb
....................\..\clk_gate.sim.cvwf
....................\..\clk_gate.sim.hdb
....................\..\clk_gate.sim.qmsg
....................\..\clk_gate.sim.rdb
....................\..\clk_gate.simfam
....................\..\clk_gate.sld_design_entry.sci
....................\..\clk_gate.sld_design_entry_dsc.sci
....................\..\clk_gate.smart_action.txt
....................\..\clk_gate.syn_hier_info
....................\..\clk_gate.tan.qmsg
....................\..\clk_gate.tis_db_list.ddb
....................\..\clk_gate.tmw_info
....................\..\logic_util_heursitic.dat
....................\..\prev_cmp_clk_gate.asm.qmsg
....................\..\prev_cmp_clk_gate.fit.qmsg
....................\..\prev_cmp_clk_gate.map.qmsg
....................\..\prev_cmp_clk_gate.qmsg
....................\..\prev_cmp_clk_gate.sim.qmsg
....................\..\prev_cmp_clk_gate.tan.qmsg
....................\..\wed.wsf
....................\gate.v
....................\gate.v.bak
....................\incremental_db
....................\..............\compiled_partitions
....................\..............\...................\clk_gate.root_partition.cmp.cdb
....................\..............\...................\clk_gate.root_partition.cmp.dfp
....................\..............\...................\clk_gate.root_partition.cmp.hdb
....................\..............\...................\clk_gate.root_partition.cmp.kpt
....................\..............\...................\clk_gate.root_partition.cmp.logdb
....................\..............\..................

CodeBus www.codebus.net