experiment1\db\logic_util_heursitic.dat
...........\..\prev_cmp_text-1.asm.qmsg
...........\..\prev_cmp_text-1.fit.qmsg
...........\..\prev_cmp_text-1.map.qmsg
...........\..\prev_cmp_text-1.qmsg
...........\..\prev_cmp_text-1.sim.qmsg
...........\..\prev_cmp_text-1.sta.qmsg
...........\..\prev_cmp_text-1.tan.qmsg
...........\..\text-1.cbx.xml
...........\..\text-1.cmp.rdb
...........\..\text-1.db_info
...........\..\text-1.eda.qmsg
...........\..\text-1.hif
...........\..\text-1.ipinfo
...........\..\text-1.map.qmsg
...........\..\text-1.map.rdb
...........\..\text-1.map_bb.hdb
...........\..\text-1.pplq.rdb
...........\..\text-1.pre_map.hdb
...........\..\text-1.pti_db_list.ddb
...........\..\text-1.sim.cvwf
...........\..\text-1.sld_design_entry.sci
...........\..\text-1.smart_action.txt
...........\..\text-1.tis_db_list.ddb
...........\..\wed.wsf
...........\incremental_db\compiled_partitions\text-1.db_info
...........\..............\...................\text-1.root_partition.cmp.dfp
...........\..............\...................\text-1.root_partition.cmp.kpt
...........\..............\...................\text-1.root_partition.cmp.logdb
...........\..............\...................\text-1.root_partition.map.dpi
...........\..............\...................\text-1.root_partition.map.kpt
...........\..............\README
...........\led0_moudle.bsf
...........\led0_moudle.v
...........\led0_moudle.v.bak
...........\led1_moudle.bsf
...........\led1_moudle.v
...........\led1_moudle.v.bak
...........\led2_moudle.bsf
...........\led2_moudle.v
...........\led2_moudle.v.bak
...........\led3_moudle.bsf
...........\led3_moudle.v
...........\led3_moudle.v.bak
...........\tb.cr.mti
...........\tb.mpf
...........\tb.v
...........\tb.v.bak
...........\text-1.asm.rpt
...........\text-1.cdf
...........\text-1.done
...........\text-1.eda.rpt
...........\text-1.fit.rpt
...........\text-1.fit.smsg
...........\text-1.fit.summary
...........\text-1.flow.rpt
...........\text-1.map.rpt
...........\text-1.map.summary
...........\text-1.pin
...........\text-1.qpf
...........\text-1.qsf
...........\text-1.qws
...........\text-1.sim.rpt
...........\text-1.sof
...........\text-1.sta.rpt
...........\text-1.sta.summary
...........\text-1.tan.rpt
...........\text-1.tan.summary
...........\text-1.tis_db_list.ddb
...........\text-1.v.bak
...........\text-1.vwf
...........\text-1_assignment_defaults.qdf
...........\text-1_description.txt
...........\top_module.bsf
...........\top_module.v
...........\top_module.v.bak
...........\top_module_0.bdf
...........\vsim.wlf
...........\work\led0_moudle\verilog.asm
...........\....\...........\_primary.dat
...........\....\...........\_primary.vhd
...........\....\...1_moudle\verilog.asm
...........\....\...........\_primary.dat
...........\....\...........\_primary.vhd
...........\....\...2_moudle\verilog.asm
...........\....\...........\_primary.dat
...........\....\...........\_primary.vhd
...........\....\...3_moudle\verilog.asm
...........\....\...........\_primary.dat
...........\....\...........\_primary.vhd
...........\....\tb\verilog.asm
...........\....\..\_primary.dat
...........\....\..\_primary.vhd
...........\....\.op_module\verilog.asm
...........\....\..........\_primary.dat
...........\....\..........\_primary.vhd
...........\....\_info
...........\incremental_db\compiled_partitions
...........\work\led0_moudle
...........\....\led1_moudle