- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 167kb
- Update:
- 2014-11-13
- Downloads:
- 0 Times
- Uploaded by:
- 陈伟豪
Description: 1) can produce four waveforms: sine, square, triangle wave, sawtooth wave.
2) to achieve an adjustable divider, the division ratio is adjustable 2 to 256, by adjusting the two keys is set to+1 and-1.
3) the adjustable signal amplitude, the amplitude of the gain is adjustable 1 to 4 times, after adjustment of the two keys is set to+1 and-1.
Before 3 4) 8 digital tube display divider ratio, the last one is displayed amplitude gain, in the middle of the four represent the four waveform is output, if the output is displayed to 1 , otherwise the 0 .
5) Four superimposed waveforms can be achieved when there are two superimposed waveforms, the gain can not be more than three, four, or three waveforms when it is superimposed, the gain can only be one.
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File list (Check if you may need any files):
myproj
......\bsf
......\...\act.bsf
......\...\division1.bsf
......\...\division2.bsf
......\...\div_clk.bsf
......\...\drive.bsf
......\...\key.bsf
......\...\myproj.bdf
......\...\sawtooth6_rom.bsf
......\...\select_wave.bsf
......\...\sel_ampl.bsf
......\...\show.bsf
......\...\sin6_rom.bsf
......\...\Squad6_rom.bsf
......\...\testup.bsf
......\...\testup4.bsf
......\...\Triangle6_rom.bsf
......\...\updown.bsf
......\...\updown4.bsf
......\cmp_state.ini
......\db
......\..\altsyncram_4um.tdf
......\..\altsyncram_gnm.tdf
......\..\altsyncram_qlm.tdf
......\..\altsyncram_s7n.tdf
......\..\altsyncram_v8n.tdf
......\..\mult_nq01.tdf
......\..\myproj.db_info
......\..\myproj.eco.cdb
......\..\myproj.sim.vwf
......\..\myproj.sld_design_entry.sci
......\..\myproj_cmp.qrpt
......\..\myproj_sim.qrpt
......\gfd
......\...\key.gdf
......\...\testup.bdf
......\...\testup.gdf
......\...\testup4.bdf
......\...\testup4.bsf
......\mif
......\...\sawtooth6.mif
......\...\sin6.mif
......\...\squad6.mif
......\...\triangle6.mif
......\myproj.asm.rpt
......\myproj.done
......\myproj.fit.eqn
......\myproj.fit.rpt
......\myproj.fit.summary
......\myproj.flow.rpt
......\myproj.map.eqn
......\myproj.map.rpt
......\myproj.map.summary
......\myproj.pin
......\myproj.pof
......\myproj.qpf
......\myproj.qsf
......\myproj.qws
......\myproj.sim.rpt
......\myproj.sof
......\myproj.tan.rpt
......\myproj.tan.summary
......\myproj.vwf
......\myproj_assignment_defaults.qdf
......\sawtooth6.mif
......\sin6.mif
......\squad6.mif
......\triangle6.mif
......\vhd
......\...\div_clk
......\...\.......\division1.vhd
......\...\.......\division2.vhd
......\...\.......\division4.vhd
......\...\.......\div_clk.vhd
......\...\other
......\...\.....\act.vhd
......\...\.....\drive.vhd
......\...\.....\key1.vhd
......\...\.....\Result.vhd
......\...\.....\rsnand.vhd
......\...\.....\select_wave.vhd
......\...\.....\sel_ampl.vhd
......\...\.....\show.vhd
......\...\.....\updown.vhd
......\...\.....\updown4.vhd
......\...\sel_rom
......\...\.......\sawtooth6_rom.vhd
......\...\.......\sin6_rom.vhd
......\...\.......\Squad6_rom.vhd
......\...\.......\Triangle6_rom.vhd
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