Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: Synchronous Download
 Description: Synchronous adding counters, D flip-flop implemented using binary counter
 Downloaders recently: [More information of uploader 赵健]
 To Search:
File list (Check if you may need any files): 
 

Synchronous\dTrigger.v
...........\Synchronous.v
Synchronous
Synchronous.qpf

CodeBus www.codebus.net