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Title: chuankou Download
 Description: UART Verilog serial port and computer communications multi byte communication program
 Downloaders recently: [More information of uploader 王志]
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chuankou\db\.cmp.kpt
........\..\my_uart_top.asm.qmsg
........\..\my_uart_top.asm.rdb
........\..\my_uart_top.asm_labs.ddb
........\..\my_uart_top.cbx.xml
........\..\my_uart_top.cmp.cdb
........\..\my_uart_top.cmp.hdb
........\..\my_uart_top.cmp.idb
........\..\my_uart_top.cmp.logdb
........\..\my_uart_top.cmp.rdb
........\..\my_uart_top.cmp0.ddb
........\..\my_uart_top.db_info
........\..\my_uart_top.fit.qmsg
........\..\my_uart_top.hier_info
........\..\my_uart_top.hif
........\..\my_uart_top.logic_util_heuristic.dat
........\..\my_uart_top.lpc.html
........\..\my_uart_top.lpc.rdb
........\..\my_uart_top.lpc.txt
........\..\my_uart_top.map.cdb
........\..\my_uart_top.map.hdb
........\..\my_uart_top.map.logdb
........\..\my_uart_top.map.qmsg
........\..\my_uart_top.map.rdb
........\..\my_uart_top.pre_map.hdb
........\..\my_uart_top.pti_db_list.ddb
........\..\my_uart_top.root_partition.map.reg_db.cdb
........\..\my_uart_top.routing.rdb
........\..\my_uart_top.rtlv.hdb
........\..\my_uart_top.rtlv_sg.cdb
........\..\my_uart_top.rtlv_sg_swap.cdb
........\..\my_uart_top.sld_design_entry.sci
........\..\my_uart_top.sld_design_entry_dsc.sci
........\..\my_uart_top.smart_action.txt
........\..\my_uart_top.smp_dump.txt
........\..\my_uart_top.sta.qmsg
........\..\my_uart_top.sta.rdb
........\..\my_uart_top.sta_cmp.5_slow.tdb
........\..\my_uart_top.tis_db_list.ddb
........\..\my_uart_top.tmw_info
........\..\my_uart_top.vpr.ammdb
........\..\prev_cmp_my_uart_top.asm.qmsg
........\..\prev_cmp_my_uart_top.fit.qmsg
........\..\prev_cmp_my_uart_top.map.qmsg
........\..\prev_cmp_my_uart_top.qmsg
........\..\prev_cmp_my_uart_top.tan.qmsg
........\incremental_db\compiled_partitions\my_uart_top.db_info
........\..............\...................\my_uart_top.root_partition.map.kpt
........\..............\README
........\my_uart_rx.v
........\my_uart_rx.v.bak
........\my_uart_top.asm.rpt
........\my_uart_top.cdf
........\my_uart_top.done
........\my_uart_top.dpf
........\my_uart_top.fit.rpt
........\my_uart_top.fit.smsg
........\my_uart_top.fit.summary
........\my_uart_top.flow.rpt
........\my_uart_top.jdi
........\my_uart_top.map.rpt
........\my_uart_top.map.summary
........\my_uart_top.pin
........\my_uart_top.pof
........\my_uart_top.qpf
........\my_uart_top.qsf
........\my_uart_top.qws
........\my_uart_top.sld
........\my_uart_top.sta.rpt
........\my_uart_top.sta.summary
........\my_uart_top.tan.rpt
........\my_uart_top.tan.summary
........\my_uart_top.v
........\my_uart_top.v.bak
........\my_uart_top_assignment_defaults.qdf
........\my_uart_tx.v
........\my_uart_tx.v.bak
........\speed_select.v
........\speed_select.v.bak
........\incremental_db\compiled_partitions
........\db
........\incremental_db
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