Description: 8-bit decimal counter, use Verilog language, to share with you about my succe
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File list (Check if you may need any files):
8位十进制计数器\cmp_state.ini
...............\CNT10.asm.rpt
...............\CNT10.bsf
...............\CNT10.done
...............\CNT10.fit.eqn
...............\CNT10.fit.rpt
...............\CNT10.fit.summary
...............\CNT10.flow.rpt
...............\CNT10.map.eqn
...............\CNT10.map.rpt
...............\CNT10.map.summary
...............\CNT10.pin
...............\CNT10.pof
...............\CNT10.qpf
...............\CNT10.qsf
...............\CNT10.qws
...............\CNT10.sof
...............\CNT10.tan.rpt
...............\CNT10.tan.summary
...............\CNT10.vhd
...............\db\CNT10.asm.qmsg
...............\..\CNT10.cbx.xml
...............\..\CNT10.cmp.cdb
...............\..\CNT10.cmp.hdb
...............\..\CNT10.cmp.rdb
...............\..\CNT10.cmp.tdb
...............\..\CNT10.cmp0.ddb
...............\..\CNT10.db_info
...............\..\CNT10.eco.cdb
...............\..\CNT10.fit.qmsg
...............\..\CNT10.hier_info
...............\..\CNT10.hif
...............\..\CNT10.map.cdb
...............\..\CNT10.map.hdb
...............\..\CNT10.map.qmsg
...............\..\CNT10.pre_map.cdb
...............\..\CNT10.pre_map.hdb
...............\..\CNT10.psp
...............\..\CNT10.rtlv.hdb
...............\..\CNT10.rtlv_sg.cdb
...............\..\CNT10.rtlv_sg_swap.cdb
...............\..\CNT10.sgdiff.cdb
...............\..\CNT10.sgdiff.hdb
...............\..\CNT10.sld_design_entry.sci
...............\..\CNT10.sld_design_entry_dsc.sci
...............\..\CNT10.syn_hier_info
...............\..\CNT10.tan.qmsg
...............\..\CNT10_cmp.qrpt
...............\db
8位十进制计数器