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Title: mod15adder_LIUZHIWEI- Download
  • Category:
  • VHDL-FPGA-Verilog
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  • File Size:
  • 2kb
  • Update:
  • 2015-07-04
  • Downloads:
  • 0 Times
  • Uploaded by:
  • Jim
 Description: Module 15 adder, to complete the 7 segment decoding and the design of the controller to control the output of LED
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mod15adder.vhd

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