- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 9.3mb
- Update:
- 2015-07-28
- Downloads:
- 0 Times
- Uploaded by:
- 齐天力
Description: Based on Automatic carry EDA VHDL language program, you can try hour, minute and second, you can manually adjust the time.
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File list (Check if you may need any files):
szz\alert.vhd
...\db\alarm.asm.qmsg
...\..\alarm.asm_labs.ddb
...\..\alarm.cbx.xml
...\..\alarm.cmp.bpm
...\..\alarm.cmp.cdb
...\..\alarm.cmp.ecobp
...\..\alarm.cmp.hdb
...\..\alarm.cmp.kpt
...\..\alarm.cmp.logdb
...\..\alarm.cmp.rdb
...\..\alarm.cmp_merge.kpt
...\..\alarm.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
...\..\alarm.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
...\..\alarm.db_info
...\..\alarm.eco.cdb
...\..\alarm.fit.qmsg
...\..\alarm.hier_info
...\..\alarm.hif
...\..\alarm.map.bpm
...\..\alarm.map.cdb
...\..\alarm.map.ecobp
...\..\alarm.map.hdb
...\..\alarm.map.kpt
...\..\alarm.map.logdb
...\..\alarm.map.qmsg
...\..\alarm.map_bb.cdb
...\..\alarm.map_bb.hdb
...\..\alarm.map_bb.hdbx
...\..\alarm.map_bb.logdb
...\..\alarm.pre_map.cdb
...\..\alarm.pre_map.hdb
...\..\alarm.psp
...\..\alarm.rtlv.hdb
...\..\alarm.rtlv_sg.cdb
...\..\alarm.rtlv_sg_swap.cdb
...\..\alarm.sgdiff.cdb
...\..\alarm.sgdiff.hdb
...\..\alarm.sld_design_entry.sci
...\..\alarm.sld_design_entry_dsc.sci
...\..\alarm.sta.qmsg
...\..\alarm.sta.rdb
...\..\alarm.sta_cmp.8_slow_1200mv_85c.tdb
...\..\alarm.syn_hier_info
...\..\alarm.tiscmp.fastest_slow_1200mv_0c.ddb
...\..\alarm.tiscmp.fastest_slow_1200mv_85c.ddb
...\..\alarm.tiscmp.fast_1200mv_0c.ddb
...\..\alarm.tiscmp.slow_1200mv_0c.ddb
...\..\alarm.tiscmp.slow_1200mv_85c.ddb
...\..\alarm.tis_db_list.ddb
...\..\alarm.tmw_info
...\..\clock.cbx.xml
...\..\clock.cmp.rdb
...\..\clock.db_info
...\..\clock.eco.cdb
...\..\clock.hier_info
...\..\clock.hif
...\..\clock.map.qmsg
...\..\clock.map_bb.hdb
...\..\clock.map_bb.hdbx
...\..\clock.rtlv.hdb
...\..\clock.rtlv_sg.cdb
...\..\clock.sld_design_entry.sci
...\..\clock.sld_design_entry_dsc.sci
...\..\clock.tis_db_list.ddb
...\..\clock1.cbx.xml
...\..\clock1.cmp.rdb
...\..\clock1.db_info
...\..\clock1.eco.cdb
...\..\clock1.hier_info
...\..\clock1.hif
...\..\clock1.map.ecobp
...\..\clock1.map.kpt
...\..\clock1.map.qmsg
...\..\clock1.map_bb.cdb
...\..\clock1.map_bb.hdb
...\..\clock1.map_bb.hdbx
...\..\clock1.map_bb.logdb
...\..\clock1.pre_map.cdb
...\..\clock1.pre_map.hdb
...\..\clock1.psp
...\..\clock1.rtlv.hdb
...\..\clock1.rtlv_sg.cdb
...\..\clock1.rtlv_sg_swap.cdb
...\..\clock1.sgdiff.cdb
...\..\clock1.sgdiff.hdb
...\..\clock1.sld_design_entry.sci
...\..\clock1.sld_design_entry_dsc.sci
...\..\clock1.syn_hier_info
...\..\clock1.tis_db_list.ddb
...\..\deled.asm.qmsg
...\..\deled.asm_labs.ddb
...\..\deled.cbx.xml
...\..\deled.cmp.bpm
...\..\deled.cmp.cdb
...\..\deled.cmp.ecobp
...\..\deled.cmp.hdb
...\..\deled.cmp.kpt
...\..\deled.cmp.logdb
...\..\deled.cmp.rdb
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