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Title: CCD_Sim Download
  • Category:
  • VHDL-FPGA-Verilog
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  • File Size:
  • 1kb
  • Update:
  • 2015-10-09
  • Downloads:
  • 0 Times
  • Uploaded by:
  • 王
 Description: The CCD camera output image process using Verilog HDL language.
 Downloaders recently: [More information of uploader 王]
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CCD_Sim.qpf

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