Description: FPGA based phase lock loop, which can be used to extract the synchronous signal
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File list (Check if you may need any files):
数字信号final
.............\Waveform1.vwf
.............\altpll0.bsf
.............\altpll0.cmp
.............\altpll0.inc
.............\altpll0.ppf
.............\altpll0.qip
.............\altpll0.v
.............\altpll0_bb.v
.............\altpll0_inst.v
.............\altpll0_wave0.jpg
.............\altpll0_waveforms.html
.............\altpll2.bsf
.............\altpll2.cmp
.............\altpll2.inc
.............\altpll2.ppf
.............\altpll2.qip
.............\altpll2.v
.............\altpll2_bb.v
.............\altpll2_inst.v
.............\altpll2_wave0.jpg
.............\altpll2_waveforms.html
.............\choose.bsf
.............\choose.v
.............\choose.v.bak
.............\clk_10M.bsf
.............\clk_10M.v
.............\clk_10M.v.bak
.............\db
.............\..\add_sub_lkc.tdf
.............\..\add_sub_mkc.tdf
.............\..\alt_u_div_gve.tdf
.............\..\digital_signal.asm.qmsg
.............\..\digital_signal.asm_labs.ddb
.............\..\digital_signal.cbx.xml
.............\..\digital_signal.cmp.bpm
.............\..\digital_signal.cmp.cdb
.............\..\digital_signal.cmp.ecobp
.............\..\digital_signal.cmp.hdb
.............\..\digital_signal.cmp.kpt
.............\..\digital_signal.cmp.logdb
.............\..\digital_signal.cmp.rdb
.............\..\digital_signal.cmp.tdb
.............\..\digital_signal.cmp0.ddb
.............\..\digital_signal.cmp2.ddb
.............\..\digital_signal.cmp_merge.kpt
.............\..\digital_signal.db_info
.............\..\digital_signal.eco.cdb
.............\..\digital_signal.eds_overflow
.............\..\digital_signal.fit.qmsg
.............\..\digital_signal.hier_info
.............\..\digital_signal.hif
.............\..\digital_signal.map.bpm
.............\..\digital_signal.map.cdb
.............\..\digital_signal.map.ecobp
.............\..\digital_signal.map.hdb
.............\..\digital_signal.map.kpt
.............\..\digital_signal.map.logdb
.............\..\digital_signal.map.qmsg
.............\..\digital_signal.map_bb.cdb
.............\..\digital_signal.map_bb.hdb
.............\..\digital_signal.map_bb.hdbx
.............\..\digital_signal.map_bb.logdb
.............\..\digital_signal.pre_map.cdb
.............\..\digital_signal.pre_map.hdb
.............\..\digital_signal.psp
.............\..\digital_signal.rtlv.hdb
.............\..\digital_signal.rtlv_sg.cdb
.............\..\digital_signal.rtlv_sg_swap.cdb
.............\..\digital_signal.sgdiff.cdb
.............\..\digital_signal.sgdiff.hdb
.............\..\digital_signal.sim.cvwf
.............\..\digital_signal.sim.hdb
.............\..\digital_signal.sim.qmsg
.............\..\digital_signal.sim.rdb
.............\..\digital_signal.sld_design_entry.sci
.............\..\digital_signal.sld_design_entry_dsc.sci
.............\..\digital_signal.syn_hier_info
.............\..\digital_signal.tan.qmsg
.............\..\digital_signal.tis_db_list.ddb
.............\..\digital_signal.tmw_info
.............\..\lpm_divide_05m.tdf
.............\..\prev_cmp_digital_signal.asm.qmsg
.............\..\prev_cmp_digital_signal.fit.qmsg
.............\..\prev_cmp_digital_signal.map.qmsg
.............\..\prev_cmp_digital_signal.qmsg
.............\..\prev_cmp_digital_signal.sim.qmsg
.............\..\prev_cmp_digital_signal.tan.qmsg
.............\..\sign_div_unsign_7kh.tdf
.............\..\wed.wsf
.............\digital_signal.asm.rpt
.............\digital_signal.bdf
.............\digital_signal.done
.............\digital_signal.fit.rpt
.............\digital_signal.fit.smsg
.............\digital_signal.fit.summary
.............\digital_signal.flow.rpt
.............\digital_signal.map.rpt
.............\digital_signal.map.smsg
.............\digital_signal.map.summary