AZPR_RTL
........\bus
........\...\include
........\...\.......\bus.h
........\...\rtl
........\...\...\bus.v
........\...\...\bus_addr_dec.v
........\...\...\bus_arbiter.v
........\...\...\bus_master_mux.v
........\...\...\bus_slave_mux.v
........\cpu
........\...\include
........\...\.......\cpu.h
........\...\.......\isa.h
........\...\.......\spm.h
........\...\rtl
........\...\...\alu.v
........\...\...\bus_if.v
........\...\...\cpu.v
........\...\...\ctrl.v
........\...\...\decoder.v
........\...\...\ex_reg.v
........\...\...\ex_stage.v
........\...\...\gpr.v
........\...\...\id_reg.v
........\...\...\id_stage.v
........\...\...\if_reg.v
........\...\...\if_stage.v
........\...\...\mem_ctrl.v
........\...\...\mem_reg.v
........\...\...\mem_stage.v
........\...\...\spm.v
........\io
........\..\gpio
........\..\....\include
........\..\....\.......\gpio.h
........\..\....\rtl
........\..\....\...\gpio.v
........\..\rom
........\..\...\include
........\..\...\.......\rom.h
........\..\...\rtl
........\..\...\...\rom.v
........\..\timer
........\..\.....\include
........\..\.....\.......\timer.h
........\..\.....\rtl
........\..\.....\...\timer.v
........\..\uart
........\..\....\include
........\..\....\.......\uart.h
........\..\....\rtl
........\..\....\...\uart.v
........\..\....\...\uart_ctrl.v
........\..\....\...\uart_rx.v
........\..\....\...\uart_tx.v
........\top
........\...\include
........\...\.......\global_config.h
........\...\.......\nettype.h
........\...\.......\stddef.h
........\...\lib
........\...\...\x_s3e_dcm.v
........\...\...\x_s3e_dpram.v
........\...\...\x_s3e_sprom.v
........\...\rtl
........\...\...\chip.v
........\...\...\chip_top.v
........\...\...\clk_gen.v
........\...\test
........\...\....\chip_top.out
........\...\....\chip_top_test.v
........\...\....\sim.cmd
........\...\....\test.dat