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Title: Matlab-and-FPGA Download
 Description: Here contains design wireless communication FPGA this book in all Matlab and Verilog code
 Downloaders recently: [More information of uploader glywhh]
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Matlab and FPGA\matlab代码\matlab\c10\c.mat
...............\..........\......\...\costas.m
...............\..........\......\...\frame_syn.m
...............\..........\......\...\PLLC.m
...............\..........\......\...\RRCrece.m
...............\..........\......\...\RRCsend.m
...............\..........\......\...\symbol_syn.m
...............\..........\......\..1\adpeq.m
...............\..........\......\...\ante.m
...............\..........\......\...\FFTlms.m
...............\..........\......\...\lms.m
...............\..........\......\...\RLS.m
...............\..........\......\...\signlms.m
...............\..........\......\...\WHT.m
...............\..........\......\...\WHTlms.m
...............\..........\......\..2\correce.m
...............\..........\......\...\matchfil.m
...............\..........\......\...\rake.m
...............\..........\......\..3\cell_search_cpich.m
...............\..........\......\...\ovsf.m
...............\..........\......\...\scramble.m
...............\..........\......\...\wcdmasource.m
...............\..........\......\.6\impinvar_bilinear.m
...............\..........\......\..\rcosflt_filter.m
...............\..........\......\..\rcosine_filter.m
...............\..........\......\.7\cicde.m
...............\..........\......\..\CICdec.m
...............\..........\......\..\cicin.m
...............\..........\......\..\CICinterp.m
...............\..........\......\..\halfdec.m
...............\..........\......\..\halfinterp.m
...............\..........\......\..\hbfil.m
...............\..........\......\..\multirece.m
...............\..........\......\..\multisend.m
...............\..........\......\.8\ASKmod.m
...............\..........\......\..\F2T.m
...............\..........\......\..\LPF.m
...............\..........\......\..\MSKmod.m
...............\..........\......\..\OFDMmod.m
...............\..........\......\..\QAMmod.m
...............\..........\......\..\QPSKmod.m
...............\..........\......\..\T2F.m
...............\..........\......\.9\convcode.m
...............\..........\......\..\CRCcheck.m
...............\..........\......\..\encoderm.m
...............\..........\......\..\encode_bit.m
...............\..........\......\..\hamming7_4.m
...............\..........\......\..\intrlvcode.m
...............\..........\......\..\RScode.m
...............\..........\......\..\rsc_encode.m
...............\..........\......\..\TCMcode.m
...............\Verilog代码\c10\10-2\mult.xco
...............\...........\...\....\mydds.xco
...............\...........\...\....\square_syn.v
...............\...........\...\...4\coastas_dds.v
...............\...........\...\....\costas_lf.v
...............\...........\...\....\costas_loop.v
...............\...........\...\....\costas_lpf.v
...............\...........\...\....\costas_mult.v
...............\...........\...\....\err_mult.v
...............\...........\...\....\fir_lpf.xco
...............\...........\...\....\mult.xco
...............\...........\...\....\my_dds.xco
...............\...........\...\...6\dearly_sub.v
...............\...........\...\....\dedds.v
...............\...........\...\....\delay_early_gate.v
...............\...........\...\....\de_mult.xco
...............\...........\...\....\eddds.xco
...............\...........\...\....\iir.v
...............\...........\...\....\iir1.v
...............\...........\...\...8\baker.v
...............\...........\..1\11-10\div16.xco
...............\...........\...\.....\fir_rls.v
...............\...........\...\.....\rlsmult.xco
...............\...........\...\.....\shiftreg25.xco
...............\...........\...\.....\shiftreg28.xco
...............\...........\...\.....\shiftreg3.xco
...............\...........\...\....2\dfe_filter.v
...............\...........\...\.....\dfe_mult.xco
...............\...........\...\....4\aa_adder.xco
...............\...........\...\.....\aa_bram.xco
...............\...........\...\.....\aa_cmult.xco
...............\...........\...\.....\ad_a.v
...............\...........\...\.....\shift16.xco
...............\...........\...\...2\fir_l

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