Description: This the clock signal in the PPM modulation design of ultraviolet communication system Settings. Edit and compile successfully with Verilog language, hope to help everyone
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File list (Check if you may need any files):
clock
.....\clock.done
.....\clock.flow.rpt
.....\clock.map.rpt
.....\clock.map.summary
.....\clock.qpf
.....\clock.qsf
.....\clock.qws
.....\clock.sim.rpt
.....\clock.v
.....\clock.v.bak
.....\clock.vwf
.....\clock_assignment_defaults.qdf
.....\db
.....\..\clock.db_info
.....\..\clock.eco.cdb
.....\..\clock.sim.cvwf
.....\..\clock.sld_design_entry.sci
.....\..\prev_cmp_clock.qmsg
.....\..\prev_cmp_clock.sim.qmsg
.....\..\wed.wsf
.....\incremental_db
.....\..............\compiled_partitions
.....\..............\...................\clock.root_partition.map.atm
.....\..............\...................\clock.root_partition.map.cdb
.....\..............\...................\clock.root_partition.map.dpi
.....\..............\...................\clock.root_partition.map.hdb
.....\..............\...................\clock.root_partition.map.hdbx
.....\..............\...................\clock.root_partition.map.kpt
.....\..............\README
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