- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 224kb
- Update:
- 2015-01-04
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- Uploaded by:
- pudn
Description: Simulate a simple intersection traffic lights (red, green, yellow, only the individual, there is no turning lights). There are four traffic lights state, one countdown 60 seconds, while the green light north-south direction, the direction of the red stuff the second is the countdown five seconds, while the LED is blinking display 0 , while red light north-south direction, the direction of the yellow stuff lights three is the countdown 30 seconds, red light east-west direction, the north-south direction of the green four is the countdown five seconds, the LED flashes 0 , something Directional Brightness yellow, red light north-south direction. Four state cycle constitutes a simple traffic light (unfinished reduce the difficulty, we designed to simplify the traffic lights, and the truth is not the same).
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