- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 4kb
- Update:
- 2015-01-11
- Downloads:
- 0 Times
- Uploaded by:
- zkw
Description: VHDL implementation of UART full duplex communication, can independently make can receive and transmit, with sending and receiving complete flag.
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File list (Check if you may need any files):
uart.vhd
uart_rx.vhd
uart_tx.vhd
speed_select.vhd
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