Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: CD1_NIOS Download
 Description: FPGA NIOS introduction program, and can be used
 Downloaders recently: [More information of uploader 叶永斌]
 To Search:
File list (Check if you may need any files):
 

CD1_NIOS\FPGA_CODE\.sopc_builder\filters.xml
........\.........\.............\install.ptf
........\.........\.............\install2.ptf
........\.........\.............\preferences.xml
........\.........\CD1_NIOS.asm.rpt
........\.........\CD1_NIOS.cdf
........\.........\CD1_NIOS.csv
........\.........\CD1_NIOS.done
........\.........\CD1_NIOS.dpf
........\.........\CD1_NIOS.fit.rpt
........\.........\CD1_NIOS.fit.smsg
........\.........\CD1_NIOS.fit.summary
........\.........\CD1_NIOS.flow.rpt
........\.........\CD1_NIOS.jdi
........\.........\CD1_NIOS.map.rpt
........\.........\CD1_NIOS.map.smsg
........\.........\CD1_NIOS.map.summary
........\.........\CD1_NIOS.pin
........\.........\CD1_NIOS.pof
........\.........\CD1_NIOS.qpf
........\.........\CD1_NIOS.qsf
........\.........\CD1_NIOS.sdc
........\.........\CD1_NIOS.sof
........\.........\CD1_NIOS.sta.rpt
........\.........\CD1_NIOS.sta.summary
........\.........\CD1_NIOS.tcl
........\.........\CD1_NIOS.v
........\.........\CD1_NIOS_PRE.csv
........\.........\cpu_0.ocp
........\.........\cpu_0.sdc
........\.........\cpu_0.v
........\.........\cpu_0_bht_ram.mif
........\.........\cpu_0_dc_tag_ram.mif
........\.........\cpu_0_ic_tag_ram.mif
........\.........\cpu_0_jtag_debug_module_sysclk.v
........\.........\cpu_0_jtag_debug_module_tck.v
........\.........\cpu_0_jtag_debug_module_wrapper.v
........\.........\cpu_0_mult_cell.v
........\.........\cpu_0_ociram_default_contents.mif
........\.........\cpu_0_oci_test_bench.v
........\.........\cpu_0_rf_ram_a.mif
........\.........\cpu_0_rf_ram_b.mif
........\.........\cpu_0_test_bench.v
........\.........\epcs_flash_controller_0.v
........\.........\epcs_flash_controller_0_boot_rom.hex
........\.........\greybox_tmp\cbx_args.txt
........\.........\IP\DM9000A\DM9000A_IF_hw.tcl
........\.........\..\.......\hdl\DM9000A_IF.v
........\.........\..\Image_RW\Image_RW.v
........\.........\..\........\Image_RW_hw.tcl
........\.........\..\........\Image_RW_hw.tclPreview
........\.........\..\........\Image_RW_hw.tcl~
........\.........\..\SRAM_16Bit_512K\hdl\SRAM_16Bit_512K.v
........\.........\..\...............\SRAM_16Bit_512K_hw.tcl
........\.........\..\TFT_SSD1963\TFT_SSD1963_IF.v
........\.........\..\...........\TFT_SSD1963_IF_hw.tcl
........\.........\..\...........\TFT_SSD1963_IF_hw.tcl~
........\.........\jtag_uart_0.v
........\.........\KEY.v
........\.........\LED.v
........\.........\nios.bsf
........\.........\nios.html
........\.........\nios.ptf
........\.........\nios.ptf.8.0
........\.........\nios.ptf.pre_generation_ptf
........\.........\nios.qip
........\.........\nios.sopc
........\.........\nios.sopcinfo
........\.........\nios.v
........\.........\nios_clock_0.v
........\.........\nios_clock_1.v
........\.........\nios_generation_script
........\.........\nios_inst.v
........\.........\nios_log.txt
........\.........\.....sim\atail-f.pl
........\.........\........\dummy_file
........\.........\........\jtag_uart_0_input_mutex.dat
........\.........\........\jtag_uart_0_input_stream.dat
........\.........\........\jtag_uart_0_output_stream.dat
........\.........\onchip_memory2_0.hex
........\.........\onchip_memory2_0.v
........\.........\output_file.jic
........\.........\output_file.map
........\.........\PLL100.ppf
........\.........\PLL100.qip
........\.........\PLL100.v
........\.........\PLL166.ppf
........\.........\PLL166.qip
........\.........\PLL166.v
........\.........\PLLJ_PLLSPE_INFO.txt
........\.........\PLL_100.qip
........\.........\sdram_0.v
........\.........\sdram_1.v
........\.........\sopc_add_qip_file.tcl
........\.........\sopc_builder_log.txt
........\.........\sram.v
........\NIOS_CODE\.metadata\.lock
........\.........\.........\.log
........\.........\.........\.plugins\com.altera.nj.ui\dialog_settings.xml
........\.........\.........\........\org.eclipse.cdt.core\.log
    

CodeBus www.codebus.net