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Title: CPLD Download
 Description: Is mainly used to implement FPGA configuration, which is achieved through the CPLD, CPLD as a configuration controller.
 Downloaders recently: [More information of uploader 吴林煌]
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File list (Check if you may need any files):
 

CPLD
....\db
....\..\cntr_19h.tdf
....\..\cntr_29h.tdf
....\..\JTAG.asm.qmsg
....\..\JTAG.asm_labs.ddb
....\..\JTAG.cbx.xml
....\..\JTAG.cmp.cdb
....\..\JTAG.cmp.hdb
....\..\JTAG.cmp.kpt
....\..\JTAG.cmp.logdb
....\..\JTAG.cmp.rdb
....\..\JTAG.cmp.tdb
....\..\JTAG.cmp0.ddb
....\..\JTAG.db_info
....\..\JTAG.eco.cdb
....\..\JTAG.fit.qmsg
....\..\JTAG.hier_info
....\..\JTAG.hif
....\..\JTAG.lpc.html
....\..\JTAG.lpc.rdb
....\..\JTAG.lpc.txt
....\..\JTAG.map.cdb
....\..\JTAG.map.hdb
....\..\JTAG.map.logdb
....\..\JTAG.map.qmsg
....\..\JTAG.pre_map.cdb
....\..\JTAG.pre_map.hdb
....\..\JTAG.rtlv.hdb
....\..\JTAG.rtlv_sg.cdb
....\..\JTAG.rtlv_sg_swap.cdb
....\..\JTAG.sgdiff.cdb
....\..\JTAG.sgdiff.hdb
....\..\JTAG.sld_design_entry.sci
....\..\JTAG.sld_design_entry_dsc.sci
....\..\JTAG.syn_hier_info
....\..\JTAG.tan.qmsg
....\..\JTAG.tis_db_list.ddb
....\..\JTAG.tmw_info
....\..\JTAG_global_asgn_op.abo
....\incremental_db
....\..............\compiled_partitions
....\..............\...................\JTAG.root_partition.map.kpt
....\..............\README
....\JTAG.asm.rpt
....\JTAG.bdf
....\JTAG.cdf
....\JTAG.done
....\JTAG.dpf
....\JTAG.fit.rpt
....\JTAG.fit.smsg
....\JTAG.fit.summary
....\JTAG.flow.rpt
....\JTAG.map.rpt
....\JTAG.map.summary
....\JTAG.pin
....\JTAG.pof
....\JTAG.qpf
....\JTAG.qsf
....\JTAG.qws
....\JTAG.tan.rpt
....\JTAG.tan.summary
....\JTAG_assignment_defaults.qdf
....\jtag_logic.bsf
....\jtag_logic.vhd
....\lpm_counter0.inc
    

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