Description: Appendix includes two contents of 1 based on the decimal counter FPGA schematic design of the ISE project a 2 guide book. The software platform is ISE13.3, the hardware platform is Spartan-3E.
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counter1
........\shiyan1
........\.......\segA
........\.......\....\_xmsgs
........\.......\....\......\pn_parser.xmsgs
........\.......\....\counter.jhd
........\.......\....\counter.sch
........\.......\....\counter_summary.html
........\.......\....\ipcore_dir
........\.......\....\iseconfig
........\.......\....\.........\counter.xreport
........\.......\....\.........\seg7A.xreport
........\.......\....\.........\segA.projectmgr
........\.......\....\sch2HdlBatchFile
........\.......\....\seg7.jhd
........\.......\....\seg7.sch
........\.......\....\seg7.sym
........\.......\....\seg7A.jhd
........\.......\....\seg7A.sch
........\.......\....\seg7A.sym
........\.......\....\seg7A.vhf
........\.......\....\seg7A_summary.html
........\.......\....\seg7B.jhd
........\.......\....\seg7B.sch
........\.......\....\seg7B.sym
........\.......\....\seg7B.vhf
........\.......\....\seg7C.jhd
........\.......\....\seg7C.sch
........\.......\....\seg7C.sym
........\.......\....\seg7C.vhf
........\.......\....\seg7D.bmm
........\.......\....\seg7D.jhd
........\.......\....\seg7D.sch
........\.......\....\seg7D.sym
........\.......\....\seg7D.vhf
........\.......\....\seg7E.jhd
........\.......\....\seg7E.sch
........\.......\....\seg7E.sym
........\.......\....\seg7E.vhf
........\.......\....\seg7F.jhd
........\.......\....\seg7F.sch
........\.......\....\seg7F.sym
........\.......\....\seg7F.vhf
........\.......\....\seg7G.jhd
........\.......\....\seg7G.sch
........\.......\....\seg7G.sym
........\.......\....\seg7G.vhf
........\.......\....\seg7_summary.html
........\.......\....\segA.gise
........\.......\....\segA.xise
........\实验一：基于原理图的十进制计数器.ppt
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