Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: ieep1.5 Download
 Description: This paper describes a 10-b high-speed COMS DAC fabricated by 0.8-pm double-poly double-metal CMOS technology. In the DAC, a new current source called the thresholdvoltage compensated current source is used in the two-stage current array to reduce the linearity error caused by inevitable current variations of the current sources
 Downloaders recently: [More information of uploader john]
 To Search:
File list (Check if you may need any files):
 

ieep1.5.pdf
    

CodeBus www.codebus.net