Description: Xilinx' s ISE-based software development intelligent car tracking avoidance source code, using Verilog language, the sensor has an infrared sensor and ultrasonic sensors
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car
...\display.v
...\display_ahead.v
...\display_left.v
...\divide.v
...\finally.bgn
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...\finally.bld
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...\finally.pcf
...\finally.prj
...\finally.ptwx
...\finally.stx
...\finally.syr
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...\finally.unroutes
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...\finally.xst
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...\finally_envsettings.html
...\finally_guide.ncd
...\finally_map.map
...\finally_map.mrp
...\finally_map.ncd
...\finally_map.ngm
...\finally_map.xrpt
...\finally_ngdbuild.xrpt
...\finally_pad.csv
...\finally_pad.txt
...\finally_par.xrpt
...\finally_summary.html
...\finally_summary.xml
...\finally_usage.xml
...\finally_xst.xrpt
...\ipcore_dir
...\iseconfig
...\.........\finally.projectmgr
...\.........\finally.xreport
...\monitor.ucf
...\pa.fromHdl.tcl
...\planAhead_pid6612.debug
...\planAhead_run_1
...\...............\finally.data
...\...............\............\constrs_1
...\...............\............\.........\designprops.xml
...\...............\............\.........\fileset.xml
...\...............\............\.........\usercols.xml
...\...............\............\sim_1
...\...............\............\.....\fileset.xml
...\...............\............\sources_1
...\...............\............\.........\fileset.xml
...\...............\............\.........\ports.xml
...\...............\............\wt
...\...............\............\..\java_command_handlers.wdf
...\...............\............\..\project.wpc
...\...............\............\..\webtalk_pa.xml
...\...............\finally.ppr
...\...............\planAhead.jou
...\...............\planAhead.log
...\...............\planAhead_run.log
...\PWM.v
...\PWM_summary.html
...\usage_statistics_webtalk.html
...\wave.v
...\wave_ahead.v
...\wave_left.v
...\webtalk.log
...\webtalk_pn.xml
...\xlnx_auto_0_xdb
...\...............\cst.xbcd
...\xst
...\...\dump.xst
...\...\........\finally.prj
...\...\........\...........\ngx
...\...\........\...........\...\notopt
...\...\........\...........\...\opt
...\...\projnav.tmp
...\...\work
...\...\....\hdllib.ref
...\...\....\vlg1E
...\...\....\.....\display.bin
...\...\....\vlg2D
...\...\....\.....\wave__left.bin
...\...\....\vlg30
...\...\....\.....\display__left.bin
...\...\....\vlg45
...\...\....\.....\divide.bin