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Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: clock Download
 Description: Design a program with Verilog have time, calibration, alarm clock, calendar and other functions of electronic clock
 Downloaders recently: [More information of uploader 刘歆]
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程序清单\分频模块.txt
........\按键去抖动模块.txt
........\数码管显示模块.txt
........\日历模块.txt
........\日期校准模块.txt
........\时钟校准模块.txt
........\时间模块.txt
........\译码模块.txt
........\选择显示功能模块.txt
........\闹钟模块.txt
........\闹钟设置模块.txt
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