- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 1kb
- Update:
- 2015-04-08
- Downloads:
- 0 Times
- Uploaded by:
- 殷超
Description: It is written by vhdl sine trigger when MCU and fpga do oscilloscope, you can refer to the trigger.
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sin_rising_judge.vhd
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