- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 1kb
- Update:
- 2015-04-08
- Downloads:
- 0 Times
- Uploaded by:
- 殷超
Description: It is written vhdl 7 m sequence generation process, can produce more for the analogy. The m-sequence can be used as an input test signal, it can simulate noise.
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cnc.vhd
M_number.vhd
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