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uart\db\uart.ae.hdb
uart\db\uart.amm.cdb
uart\db\uart.asm.qmsg
uart\db\uart.asm.rdb
uart\db\uart.asm_labs.ddb
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uart\db\uart.cmp.bpm
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uart\db\uart.cmp.kpt
uart\db\uart.cmp.logdb
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uart\db\uart.cmp0.ddb
uart\db\uart.cmp1.ddb
uart\db\uart.cmp2.ddb
uart\db\uart.cmp_merge.kpt
uart\db\uart.db_info
uart\db\uart.eda.qmsg
uart\db\uart.fit.qmsg
uart\db\uart.hier_info
uart\db\uart.hif
uart\db\uart.idb.cdb
uart\db\uart.lpc.html
uart\db\uart.lpc.rdb
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uart\db\uart.map.bpm
uart\db\uart.map.cdb
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uart\db\uart.map.kpt
uart\db\uart.map.logdb
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uart\db\uart.map_bb.cdb
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uart\db\uart.map_bb.logdb
uart\db\uart.pre_map.cdb
uart\db\uart.pre_map.hdb
uart\db\uart.rpp.qmsg
uart\db\uart.rtlv.hdb
uart\db\uart.rtlv_sg.cdb
uart\db\uart.rtlv_sg_swap.cdb
uart\db\uart.sgate.rvd
uart\db\uart.sgate_sm.rvd
uart\db\uart.sgdiff.cdb
uart\db\uart.sgdiff.hdb
uart\db\uart.sld_design_entry.sci
uart\db\uart.sld_design_entry_dsc.sci
uart\db\uart.smart_action.txt
uart\db\uart.smp_dump.txt
uart\db\uart.sta.qmsg
uart\db\uart.sta.rdb
uart\db\uart.sta_cmp.8_slow.tdb
uart\db\uart.stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd
uart\db\uart.stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd
uart\db\uart.stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd
uart\db\uart.syn_hier_info
uart\db\uart.tis_db_list.ddb
uart\db\uart.tmw_info
uart\incremental_db\compiled_partitions\uart.db_info
uart\incremental_db\compiled_partitions\uart.root_partition.cmp.cbp
uart\incremental_db\compiled_partitions\uart.root_partition.cmp.cdb
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uart\incremental_db\compiled_partitions\uart.root_partition.map.hdb
uart\incremental_db\compiled_partitions\uart.root_partition.map.kpt
uart\incremental_db\README
uart\simulation\modelsim\gate_work\uart_top\verilog.prw
uart\simulation\modelsim\gate_work\uart_top\verilog.psm
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uart\simulation\modelsim\gate_work\_info
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uart\simulation\modelsim\rtl_work\_info
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uart\simulation\modelsim\uart.sft