File list (Check if you may need any files):
half_clk
........\design
........\......\half_clk.v
........\......\half_clk.v.bak
........\sim
........\...\half_clk.cr.mti
........\...\half_clk.mpf
........\...\tb_half_clk.v
........\...\tb_half_clk.v.bak
........\...\vsim.wlf
........\...\work
........\...\....\_info
........\...\....\_temp
........\...\....\.....\vlog3fiv59
........\...\....\.....\vlog7gbb9n
........\...\....\.....\vlogjjg981
........\...\....\.....\vlogvjhx96
........\...\....\.....\vlogxfeiah
........\...\....\_vmake
........\...\....\half_clk
........\...\....\........\_primary.dat
........\...\....\........\_primary.dbs
........\...\....\........\_primary.vhd
........\...\....\........\verilog.asm64
........\...\....\........\verilog.rw64
........\...\....\tb_half_sclk
........\...\....\............\_primary.dat
........\...\....\............\_primary.dbs
........\...\....\............\_primary.vhd
........\...\....\............\verilog.asm64
........\...\....\............\verilog.rw64
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