Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: waveled Download
 Description: verilog to achieve water lights function: left to right, then right to left, in the middle to both sides, including the verification FIG code, documentation, detailed description
 Downloaders recently: [More information of uploader 张杰]
 To Search:
File list (Check if you may need any files):
 

QQ截图20141030145523.jpg
QQ截图20141030172147.jpg
QQ截图20141030172225.jpg
RTL.jpg
RTL级电路.jpg
中间到两边.jpg
分频50mh→1hz.txt
实例之流水灯.doc
左←右.jpg
左→右.jpg
常用小模块verilog编写.doc
常用小模块的verilog编写.doc
李波的流水灯代码.v
模式的切换.jpg
流水灯由左到右.jpg
    

CodeBus www.codebus.net