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Title: HLSynth Download
 Description: high-level synthesis examples and VHDL source codes for benchmarks circuits
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HLSynth\HLSynth95\complete\adaptive\adintpol_v8.sil
.......\.........\........\........\examples\example1\Inp.m
.......\.........\........\........\........\........\Inp.s
.......\.........\........\........\........\........\Inp.t
.......\.........\........\........\........\........\Out.trunc
.......\.........\........\........\........\........\readme
.......\.........\........\........\........\.......2\Inp.m
.......\.........\........\........\........\........\Inp.s
.......\.........\........\........\........\........\Inp.t
.......\.........\........\........\........\........\Out.trunc
.......\.........\........\........\........\........\readme
.......\.........\........\........\........\.......3\Inp.m
.......\.........\........\........\........\........\Inp.s
.......\.........\........\........\........\........\Inp.t
.......\.........\........\........\........\........\Out.trunc
.......\.........\........\........\........\........\readme
.......\.........\........\........\........\.......4\Inp.m
.......\.........\........\........\........\........\Inp.s
.......\.........\........\........\........\........\Inp.t
.......\.........\........\........\........\........\Out.trunc
.......\.........\........\........\........\........\readme
.......\.........\........\........\........\.......5\Inp.m
.......\.........\........\........\........\........\Inp.s
.......\.........\........\........\........\........\Inp.t
.......\.........\........\........\........\........\Out.trunc
.......\.........\........\........\........\........\readme
.......\.........\........\........\........\README
.......\.........\........\........\........\steeno\Inp.m
.......\.........\........\........\........\......\Inp.s.Z
.......\.........\........\........\........\......\Inp.t.Z
.......\.........\........\........\........\......\Out.trunc.Z
.......\.........\........\........\README
.......\.........\........\.nswer\ans.sc
.......\.........\........\......\ans.vhdl
.......\.........\........\......\ans_sim.vhdl
.......\.........\........\......\README
.......\.........\........\barcode\barcode.io
.......\.........\........\.......\barcode.vhdl
.......\.........\........\.......\barcode_stim.vhdl
.......\.........\........\.......\comments
.......\.........\........\.......\pseudo_code
.......\.........\........\.......\README
.......\.........\........\fp_add\adder.doc
.......\.........\........\......\adder.vhd
.......\.........\........\......\README
.......\.........\........\......\test.doc
.......\.........\........\......\test.vhd
.......\.........\........\...divider\radix512\cmd.inc
.......\.........\........\..........\........\makefile
.......\.........\........\..........\........\pack.vhdl
.......\.........\........\..........\........\radix512.doc
.......\.........\........\..........\........\radix512.vhdl
.......\.........\........\..........\........\README
.......\.........\........\..........\........\test_vectors.doc
.......\.........\........\..........\........\test_vectors.vhdl
.......\.........\........\..........\test_vectors_generation\make_test
.......\.........\........\..........\.......................\make_tv
.......\.........\........\..........\.......................\make_tv.c
.......\.........\........\..........\.......................\make_tv.doc
.......\.........\........\..........\.......................\README
.......\.........\........\..........\.......................\test_vectors.bit
.......\.........\........\..........\.......................\test_vectors.vhdl
.......\.........\........\...mult\FP_mult.doc
.......\.........\........\.......\FP_mult.vhd
.......\.........\........\.......\mtrans.c
.......\.........\........\.......\m_b2vhdl
.......\.........\........\.......\README
.......\.........\........\.......\test.doc
.......\.........\........\.......\test.vhd
.......\.........\........\.......\tvector.bits
.......\.........\........\prawn\cmd.i
.......\.........\........\.....\cpu.vhdl
.......\.........\........\.....\lib.vhdl
.......\.........\........\.....\Makefil

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