UART-master
...........\.gitattributes
...........\.gitignore
...........\UART
...........\....\db
...........\....\..\UART.rtlv_sg.cdb
...........\....\..\UART.rtlv_sg_swap.cdb
...........\....\..\UART.sgdiff.cdb
...........\....\..\UART.sgdiff.hdb
...........\....\..\UART.sld_design_entry.sci
...........\....\..\UART.sld_design_entry_dsc.sci
...........\....\..\UART.smart_action.txt
...........\....\..\UART.sta.qmsg
...........\....\..\UART.sta.rdb
...........\....\..\UART.sta_cmp.7_slow.tdb
...........\....\..\UART.syn_hier_info
...........\....\..\UART.tis_db_list.ddb
...........\....\..\UART.tmw_info
...........\....\..\add_sub_lkc.tdf
...........\....\..\add_sub_mkc.tdf
...........\....\..\alt_u_div_g2f.tdf
...........\....\..\alt_u_div_uve.tdf
...........\....\..\logic_util_heursitic.dat
...........\....\..\lpm_divide_4dm.tdf
...........\....\..\lpm_divide_dem.tdf
...........\....\..\prev_cmp_UART.qmsg
...........\....\..\sign_div_unsign_ekh.tdf
...........\....\..\sign_div_unsign_nlh.tdf
...........\....\incremental_db
...........\....\..............\README
...........\....\..............\compiled_partitions
...........\....\..............\...................\UART.db_info
...........\....\..............\...................\UART.root_partition.cmp.cdb
...........\....\..............\...................\UART.root_partition.cmp.dfp
...........\....\..............\...................\UART.root_partition.cmp.hdb
...........\....\..............\...................\UART.root_partition.cmp.kpt
...........\....\..............\...................\UART.root_partition.cmp.logdb
...........\....\..............\...................\UART.root_partition.cmp.rcfdb
...........\....\..............\...................\UART.root_partition.map.cdb
...........\....\..............\...................\UART.root_partition.map.dpi
...........\....\..............\...................\UART.root_partition.map.hbdb.cdb
...........\....\..............\...................\UART.root_partition.map.hbdb.hb_info
...........\....\..............\...................\UART.root_partition.map.hbdb.hdb
...........\....\..............\...................\UART.root_partition.map.hbdb.sig
...........\....\..............\...................\UART.root_partition.map.hdb
...........\....\..............\...................\UART.root_partition.map.kpt
...........\....\simulation
...........\....\..........\modelsim
...........\....\..........\........\UART.sft
...........\....\..........\........\UART.vho
...........\....\..........\........\UART_fast.vho
...........\....\..........\........\UART_modelsim.xrf
...........\....\..........\........\UART_run_msim_rtl_vhdl.do
...........\....\..........\........\UART_vhd.sdo
...........\....\..........\........\UART_vhd_fast.sdo
...........\....\..........\........\modelsim.ini
...........\....\..........\........\msim_transcript
...........\....\..........\........\rtl_work
...........\....\..........\........\........\_info
...........\....\..........\........\........\_vmake
...........\....\..........\........\........\rx
...........\....\..........\........\........\..\_primary.dat
...........\....\..........\........\........\..\_primary.dbs
...........\....\..........\........\........\..\main.dat
...........\....\..........\........\........\..\main.dbs
...........\....\..........\........\........\..\main.prw
...........\....\..........\........\........\..\main.psm
...........\....\..........\........\........\tx
...........\....\..........\........\........\..\_primary.dat
...........\....\..........\........\........\..\_primary.dbs
...........\....\..........\........\........\..\main.dat
...........\....\..........\........\........\..\main.dbs
...........\....\..........\........\........\..\main.prw
...........\....\..........\........\........\..\main.psm
...........\....\..........\........\........\uart
...........\....\..........\........\........\....\_primary.dat
...........\....\..........\........\........\....\_primary.dbs
...........\....\..........\........\........\....\main.dat
...........