fpga\.ipinfo
....\.pplq.rdb
....\.sopc_builder\filters.xml
....\.............\preferences.xml
....\Abc.asm.rpt
....\Abc.done
....\Abc.dpf
....\Abc.fit.rpt
....\Abc.fit.summary
....\Abc.flow.rpt
....\Abc.map.rpt
....\Abc.map.summary
....\Abc.pin
....\Abc.qpf
....\Abc.qsf
....\Abc.qws
....\Abc.sim.rpt
....\Abc.sof
....\Abc.sta.rpt
....\Abc.sta.summary
....\Abc.v
....\Abc.v.bak
....\Abc.vwf
....\adder10.asm.rpt
....\adder10.done
....\adder10.dpf
....\adder10.fit.rpt
....\adder10.fit.summary
....\adder10.flow.rpt
....\adder10.map.rpt
....\adder10.map.summary
....\adder10.pin
....\adder10.qpf
....\adder10.qsf
....\adder10.qws
....\adder10.sim.rpt
....\adder10.sof
....\adder10.sta.rpt
....\adder10.sta.summary
....\adder10.v
....\adder10.v.bak
....\adder10.vwf
....\adder4.asm.rpt
....\adder4.done
....\adder4.dpf
....\adder4.fit.rpt
....\adder4.fit.summary
....\adder4.flow.rpt
....\adder4.map.rpt
....\adder4.map.summary
....\adder4.pin
....\adder4.qpf
....\adder4.qsf
....\adder4.qws
....\adder4.sim.rpt
....\adder4.sof
....\adder4.sta.rpt
....\adder4.sta.summary
....\adder4.v
....\adder4.v.bak
....\adder4.vwf
....\A_clock.asm.rpt
....\A_clock.done
....\A_clock.dpf
....\A_clock.fit.rpt
....\A_clock.fit.summary
....\A_clock.flow.rpt
....\A_clock.map.rpt
....\A_clock.map.summary
....\A_clock.pin
....\A_clock.qpf
....\A_clock.qsf
....\A_clock.qws
....\A_clock.sof
....\A_clock.sta.rpt
....\A_clock.sta.summary
....\A_clock.v
....\A_clock.v.bak
....\A_clock_assignment_defaults.qdf
....\bell.v
....\bell.v.bak
....\clock.asm.rpt
....\clock.done
....\clock.dpf
....\clock.fit.rpt
....\clock.fit.summary
....\clock.flow.rpt
....\clock.map.rpt
....\clock.map.smsg
....\clock.map.summary
....\clock.pin
....\clock.qpf
....\clock.qsf
....\clock.qws
....\clock.sof
....\clock.sta.rpt
....\clock.sta.summary
....\clock.v
....\clock.v.bak
....\couter10.asm.rpt