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Title: _USB_FPGA Download
 Description: It is an 68013A and FPGA for data communication, including drivers, firmware, and FPGA program
 Downloaders recently: [More information of uploader 宋江]
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毕业设计程序 - 副本\USB速度测试(固件和FPGA)\fpga_master\db\fpga_master.amm.cdb
...................\.........................\...........\..\fpga_master.asm.qmsg
...................\.........................\...........\..\fpga_master.asm.rdb
...................\.........................\...........\..\fpga_master.asm_labs.ddb
...................\.........................\...........\..\fpga_master.autoh_e4eb1.map.reg_db.cdb
...................\.........................\...........\..\fpga_master.autol_7d8f1.map.reg_db.cdb
...................\.........................\...........\..\fpga_master.cbx.xml
...................\.........................\...........\..\fpga_master.cmp.bpm
...................\.........................\...........\..\fpga_master.cmp.cdb
...................\.........................\...........\..\fpga_master.cmp.hdb
...................\.........................\...........\..\fpga_master.cmp.kpt
...................\.........................\...........\..\fpga_master.cmp.logdb
...................\.........................\...........\..\fpga_master.cmp.rdb
...................\.........................\...........\..\fpga_master.cmp0.ddb
...................\.........................\...........\..\fpga_master.cmp1.ddb
...................\.........................\...........\..\fpga_master.cmp2.ddb
...................\.........................\...........\..\fpga_master.cmp_merge.kpt
...................\.........................\...........\..\fpga_master.db_info
...................\.........................\...........\..\fpga_master.eda.qmsg
...................\.........................\...........\..\fpga_master.fit.qmsg
...................\.........................\...........\..\fpga_master.hier_info
...................\.........................\...........\..\fpga_master.hif
...................\.........................\...........\..\fpga_master.idb.cdb
...................\.........................\...........\..\fpga_master.lpc.html
...................\.........................\...........\..\fpga_master.lpc.rdb
...................\.........................\...........\..\fpga_master.lpc.txt
...................\.........................\...........\..\fpga_master.map.bpm
...................\.........................\...........\..\fpga_master.map.cdb
...................\.........................\...........\..\fpga_master.map.hdb
...................\.........................\...........\..\fpga_master.map.kpt
...................\.........................\...........\..\fpga_master.map.logdb
...................\.........................\...........\..\fpga_master.map.qmsg
...................\.........................\...........\..\fpga_master.map.rdb
...................\.........................\...........\..\fpga_master.map_bb.cdb
...................\.........................\...........\..\fpga_master.map_bb.hdb
...................\.........................\...........\..\fpga_master.map_bb.logdb
...................\.........................\...........\..\fpga_master.pre_map.cdb
...................\.........................\...........\..\fpga_master.pre_map.hdb
...................\.........................\...........\..\fpga_master.root_partition.map.reg_db.cdb
...................\.........................\...........\..\fpga_master.routing.rdb
...................\.........................\...........\..\fpga_master.rtlv.hdb
...................\.........................\...........\..\fpga_master.rtlv_sg.cdb
...................\.........................\...........\..\fpga_master.rtlv_sg_swap.cdb
...................\.........................\...........\..\fpga_master.sgdiff.cdb
...................\.........................\...........\..\fpga_master.sgdiff.hdb
...................\.........................\...........\..\fpga_master.sld_design_entry.sci
...................\.........................\...........\..\fpga_master.sld_design_entry_dsc.sci
...................\.........................\...........\..\fpga_master.smart_action.txt
...................\.....................

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