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VHDL-FPGA-Verilog
Title:
Random-sequence-of-test
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Category:
VHDL-FPGA-Verilog
Tags:
[VHDL]
[源码]
File Size:
2kb
Update:
2016-07-20
Downloads:
0 Times
Uploaded by:
李丽
Description:
Random sequence of test source, the use verilog to write, feel useful, I hope you like
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(Check if you may need any files):
随机序列测试\PrbsAnyGenerator.v ............\sn_detector.v ............\tb_random_FSM10010.v 随机序列测试
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