Description: FPGA experiment, water lamp program design based on VHDL language, using modular design train of thought.Downloaded to the board on the test pass.
To Search:
File list (Check if you may need any files):
led_river
.........\.lso
.........\count.cmd_log
.........\count.prj
.........\count.spl
.........\count.stx
.........\count.sym
.........\count.vhd
.........\count.xst
.........\count_vhdl.prj
.........\display.cmd_log
.........\display.prj
.........\display.spl
.........\display.stx
.........\display.sym
.........\display.vhd
.........\display.vhi
.........\display.xst
.........\display_vhdl.prj
.........\fdiv.cmd_log
.........\fdiv.prj
.........\fdiv.spl
.........\fdiv.stx
.........\fdiv.sym
.........\fdiv.vhd
.........\fdiv.xst
.........\fdiv_summary.html
.........\fdiv_vhdl.prj
.........\impact.xsl
.........\impact_impact.xwbt
.........\ipcore_dir
.........\iseconfig
.........\.........\fdiv.xreport
.........\.........\led_river.projectmgr
.........\.........\tu.xreport
.........\leducf.ucf
.........\led_river.gise
.........\led_river.xise
.........\pa.fromHdl.tcl
.........\pepExtractor.prj
.........\planAhead_run_1
.........\...............\led_river.data
.........\...............\..............\constrs_1
.........\...............\..............\.........\designprops.xml
.........\...............\..............\.........\fileset.xml
.........\...............\..............\.........\usercols.xml
.........\...............\..............\sources_1
.........\...............\..............\.........\fileset.xml
.........\...............\..............\.........\ports.xml
.........\...............\..............\wt
.........\...............\..............\..\webtalk_pa.xml
.........\...............\led_river.ppr
.........\...............\planAhead.jou
.........\...............\planAhead.log
.........\...............\planAhead_run.log
.........\planAhead_run_2
.........\...............\led_river.data
.........\...............\..............\constrs_1
.........\...............\..............\.........\designprops.xml
.........\...............\..............\.........\fileset.xml
.........\...............\..............\.........\usercols.xml
.........\...............\..............\sources_1
.........\...............\..............\.........\fileset.xml
.........\...............\..............\.........\ports.xml
.........\...............\..............\wt
.........\...............\..............\..\webtalk_pa.xml
.........\...............\led_river.ppr
.........\...............\planAhead.jou
.........\...............\planAhead.log
.........\...............\planAhead_run.log
.........\sch2HdlBatchFile
.........\tu.bgn
.........\tu.bit
.........\tu.bld
.........\tu.cmd_log
.........\tu.drc
.........\tu.jhd
.........\tu.lso
.........\tu.ncd
.........\tu.ngc
.........\tu.ngd
.........\tu.ngr
.........\tu.pad
.........\tu.par
.........\tu.pcf
.........\tu.prj
.........\tu.ptwx
.........\tu.sch
.........\tu.stx
.........\tu.syr
.........\tu.twr
.........\tu.twx
.........\tu.ucf
.........\tu.unroutes
.........\tu.ut
.........\tu.vhf
.........\tu.xpi
.........\tu.xst
.........\tu_bitgen.xwbt
.........\tu_envsettings.html
Download