Description: FPGA experiment, the experiment platform based on xinlix stopwatch program implementation, download to experiment, the test pass.
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miaobiao
........\.lso
........\calc.cmd_log
........\calc.spl
........\calc.sym
........\disp.cmd_log
........\disp.spl
........\disp.sym
........\divclk.bgn
........\divclk.bit
........\DIVCLK.bld
........\DIVCLK.cmd_log
........\divclk.drc
........\DIVCLK.lso
........\DIVCLK.ncd
........\DIVCLK.ngc
........\DIVCLK.ngd
........\DIVCLK.ngr
........\DIVCLK.pad
........\DIVCLK.par
........\DIVCLK.pcf
........\DIVCLK.prj
........\DIVCLK.ptwx
........\DIVCLK.spl
........\DIVCLK.stx
........\DIVCLK.sym
........\DIVCLK.syr
........\DIVCLK.unroutes
........\DIVCLK.ut
........\DIVCLK.xpi
........\DIVCLK.xst
........\DIVCLK_bitgen.xwbt
........\DIVCLK_envsettings.html
........\DIVCLK_guide.ncd
........\DIVCLK_map.map
........\DIVCLK_map.mrp
........\DIVCLK_map.ncd
........\DIVCLK_map.ngm
........\DIVCLK_map.xrpt
........\DIVCLK_ngdbuild.xrpt
........\DIVCLK_pad.csv
........\DIVCLK_pad.txt
........\DIVCLK_par.xrpt
........\DIVCLK_summary.html
........\DIVCLK_summary.xml
........\DIVCLK_usage.xml
........\DIVCLK_xst.xrpt
........\ipcore_dir
........\iseconfig
........\.........\DIVCLK.xreport
........\.........\miaobiao.projectmgr
........\.........\miaobiao.xreport
........\.........\miaobiao1.xreport
........\miaobiao.cmd_log
........\miaobiao.gise
........\miaobiao.jhd
........\miaobiao.sch
........\miaobiao.sym
........\miaobiao.ucf
........\miaobiao.v
........\miaobiao.xise
........\miaobiao1.prj
........\miaobiao1.stx
........\miaobiao1.ucf
........\miaobiao1.v
........\miaobiao1.xst
........\miaobiao1_summary.html
........\miaobiao2.ucf
........\miaobiao_summary.html
........\sch2HdlBatchFile
........\usage_statistics_webtalk.html
........\webtalk.log
........\webtalk_pn.xml
........\xlnx_auto_0_xdb
........\...............\cst.xbcd
........\xst
........\...\dump.xst
........\...\........\DIVCLK.prj
........\...\........\..........\ngx
........\...\........\..........\...\notopt
........\...\........\..........\...\opt
........\...\projnav.tmp
........\...\work
........\...\....\hdllib.ref
........\...\....\vlg1D
........\...\....\.....\_d_i_v_c_l_k.bin
........\...\....\vlg44
........\...\....\.....\disp.bin
........\...\....\vlg4F
........\...\....\.....\calc.bin
........\_ngo
........\....\netlist.lst
........\_xmsgs
........\......\bitgen.xmsgs
........\......\map.xmsgs
........\......\ngdbuild.xmsgs
........\......\par.xmsgs
........\......\pn_parser.xmsgs
........\......\xst.xmsgs