- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 876kb
- Update:
- 2016-12-27
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- Uploaded by:
- 小方
Description: 1, different statements are described in VHDL language task selector, and distinguished by comparing different statements compiled simulation described. 2, and verify the results through hardware simulation download.
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实验2
.....\1、MUX41A
.....\.........\MUX41A.asm.rpt
.....\.........\MUX41A.done
.....\.........\MUX41A.fit.eqn
.....\.........\MUX41A.fit.rpt
.....\.........\MUX41A.fit.summary
.....\.........\MUX41A.flow.rpt
.....\.........\MUX41A.map.eqn
.....\.........\MUX41A.map.rpt
.....\.........\MUX41A.map.summary
.....\.........\MUX41A.pin
.....\.........\MUX41A.pof
.....\.........\MUX41A.qpf
.....\.........\MUX41A.qsf
.....\.........\MUX41A.qws
.....\.........\MUX41A.sim.rpt
.....\.........\MUX41A.sof
.....\.........\MUX41A.tan.rpt
.....\.........\MUX41A.tan.summary
.....\.........\MUX41A.vhd
.....\.........\MUX41A.vwf
.....\.........\db
.....\.........\..\MUX41A.asm.qmsg
.....\.........\..\MUX41A.asm_labs.ddb
.....\.........\..\MUX41A.cbx.xml
.....\.........\..\MUX41A.cmp.cdb
.....\.........\..\MUX41A.cmp.hdb
.....\.........\..\MUX41A.cmp.logdb
.....\.........\..\MUX41A.cmp.qrpt
.....\.........\..\MUX41A.cmp.rdb
.....\.........\..\MUX41A.cmp.tdb
.....\.........\..\MUX41A.cmp0.ddb
.....\.........\..\MUX41A.cmp2.ddb
.....\.........\..\MUX41A.db_info
.....\.........\..\MUX41A.dbp
.....\.........\..\MUX41A.eco.cdb
.....\.........\..\MUX41A.eds_overflow
.....\.........\..\MUX41A.fit.qmsg
.....\.........\..\MUX41A.hier_info
.....\.........\..\MUX41A.hif
.....\.........\..\MUX41A.map.cdb
.....\.........\..\MUX41A.map.hdb
.....\.........\..\MUX41A.map.logdb
.....\.........\..\MUX41A.map.qmsg
.....\.........\..\MUX41A.pre_map.cdb
.....\.........\..\MUX41A.pre_map.hdb
.....\.........\..\MUX41A.psp
.....\.........\..\MUX41A.rtlv.hdb
.....\.........\..\MUX41A.rtlv_sg.cdb
.....\.........\..\MUX41A.rtlv_sg_swap.cdb
.....\.........\..\MUX41A.sgdiff.cdb
.....\.........\..\MUX41A.sgdiff.hdb
.....\.........\..\MUX41A.signalprobe.cdb
.....\.........\..\MUX41A.sim.hdb
.....\.........\..\MUX41A.sim.qmsg
.....\.........\..\MUX41A.sim.qrpt
.....\.........\..\MUX41A.sim.rdb
.....\.........\..\MUX41A.sim.vwf
.....\.........\..\MUX41A.sld_design_entry.sci
.....\.........\..\MUX41A.sld_design_entry_dsc.sci
.....\.........\..\MUX41A.syn_hier_info
.....\.........\..\MUX41A.tan.qmsg
.....\2、MUX41A
.....\.........\MUX41A.asm.rpt
.....\.........\MUX41A.done
.....\.........\MUX41A.fit.eqn
.....\.........\MUX41A.fit.rpt
.....\.........\MUX41A.fit.summary
.....\.........\MUX41A.flow.rpt
.....\.........\MUX41A.map.eqn
.....\.........\MUX41A.map.rpt
.....\.........\MUX41A.map.summary
.....\.........\MUX41A.pin
.....\.........\MUX41A.pof
.....\.........\MUX41A.qpf
.....\.........\MUX41A.qsf
.....\.........\MUX41A.qws
.....\.........\MUX41A.sim.rpt
.....\.........\MUX41A.sof
.....\.........\MUX41A.tan.rpt
.....\.........\MUX41A.tan.summary
.....\.........\MUX41A.vhd
.....\.........\MUX41A.vwf
.....\.........\db
.....\.........\..\MUX41A.asm.qmsg
.....\.........\..\MUX41A.asm_labs.ddb
.....\.........\..\MUX41A.cbx.xml
.....\.........\..\MUX41A.cmp.cdb
.....\.........\..\MUX41A.cmp.hdb
.....\.........\..\MUX41A.cmp.logdb
.....\.........\..\MUX41A.cmp.qrpt
.....\.........\..\MUX41A.cmp.rdb
.....\.........\..\MUX41A.cmp.tdb
.....\.........\..\MUX41A.cmp0.ddb
.....\.........\..\MUX41A.cmp2.ddb
.....\.........\..\MUX41A.db_info
.....\.........\..\MUX41A.dbp
.....\.........\..\MUX41A.eco.cdb
.....\.........\..\MUX41A.eds_overflow
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