Title:
Interleaver_Deinterleaver
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Description: Communication in the convolutional interleaving/de interleaving FPGA source program, using verilogHDL code to achieve, including test procedures, after verification.
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Interleaver_Deinterleaver
.........................\resource
.........................\........\Convolutional_Deinterleaver.v
.........................\........\Convolutional_Interleaver.v
.........................\........\deinterleaver_channel_cont.v
.........................\........\double_port_ram.v
.........................\........\interleaver_channel_cont.v
.........................\........\Interleaver_Deinterleaver.v
.........................\........\Interleaver_Deinterleaver_Testbench.v
.........................\........\readme.txt
