Description: This program implements the pipeline, you may be required to change the parameters according to their own try xilinx chip with verilog language
To Search:
File list (Check if you may need any files):
liushui\bachengba.cmd_log
.......\bachengba.lso
.......\bachengba.ngc
.......\bachengba.ngr
.......\bachengba.prj
.......\bachengba.stx
.......\bachengba.syr
.......\bachengba.v
.......\bachengba.xst
.......\bachengba_envsettings.html
.......\bachengba_summary.html
.......\bachengba_xst.xrpt
.......\chenfa.gise
.......\chenfa.xise
.......\iseconfig\bachengba.xreport
.......\.........\chenfa.projectmgr
.......\.........\sichengsi.xreport
.......\liushui.gise
.......\liushui.xise
.......\sichengsi.v
.......\sichengsi_summary.html
.......\webtalk_pn.xml
.......\xst\work\work.sdbl
.......\...\....\work.sdbx
.......\_xmsgs\pn_parser.xmsgs
.......\......\xst.xmsgs
.......\xst\dump.xst\bachengba.prj
.......\...\dump.xst
.......\...\projnav.tmp
.......\...\work
.......\iseconfig
.......\xst
.......\_xmsgs
liushui
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