- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 9kb
- Update:
- 2016-03-08
- Downloads:
- 0 Times
- Uploaded by:
- 高
Description: Output than the set of 8 times the clock frequency of the clock, to achieve frequency division function, can be used for chip control.
To Search:
File list (Check if you may need any files):
fenpin.docx
Download