FPGA
....\exp2_1
....\......\cmp_state.ini
....\......\db
....\......\..\mux_j8c.tdf
....\......\..\prev_cmp_reexpei2.asm.qmsg
....\......\..\prev_cmp_reexpei2.fit.qmsg
....\......\..\prev_cmp_reexpei2.map.qmsg
....\......\..\prev_cmp_reexpei2.tan.qmsg
....\......\..\reexpei2.asm.qmsg
....\......\..\reexpei2.asm_labs.ddb
....\......\..\reexpei2.cbx.xml
....\......\..\reexpei2.cmp.cdb
....\......\..\reexpei2.cmp.hdb
....\......\..\reexpei2.cmp.logdb
....\......\..\reexpei2.cmp.rdb
....\......\..\reexpei2.cmp.tdb
....\......\..\reexpei2.cmp0.ddb
....\......\..\reexpei2.db_info
....\......\..\reexpei2.dbp
....\......\..\reexpei2.eco.cdb
....\......\..\reexpei2.fit.qmsg
....\......\..\reexpei2.hier_info
....\......\..\reexpei2.hif
....\......\..\reexpei2.map.cdb
....\......\..\reexpei2.map.hdb
....\......\..\reexpei2.map.logdb
....\......\..\reexpei2.map.qmsg
....\......\..\reexpei2.pre_map.cdb
....\......\..\reexpei2.pre_map.hdb
....\......\..\reexpei2.psp
....\......\..\reexpei2.pss
....\......\..\reexpei2.rpp.qmsg
....\......\..\reexpei2.rtlv.hdb
....\......\..\reexpei2.rtlv_sg.cdb
....\......\..\reexpei2.rtlv_sg_swap.cdb
....\......\..\reexpei2.sgate.rvd
....\......\..\reexpei2.sgate_sm.rvd
....\......\..\reexpei2.sgdiff.cdb
....\......\..\reexpei2.sgdiff.hdb
....\......\..\reexpei2.signalprobe.cdb
....\......\..\reexpei2.sim.vwf
....\......\..\reexpei2.sld_design_entry.sci
....\......\..\reexpei2.sld_design_entry_dsc.sci
....\......\..\reexpei2.syn_hier_info
....\......\..\reexpei2.tan.qmsg
....\......\..\reexpei2.tis_db_list.ddb
....\......\..\reexpei2_cmp.qrpt
....\......\..\reexpei2_sim.qrpt
....\......\demo2.bsf
....\......\demo2.vhd
....\......\reexpei2.asm.rpt
....\......\reexpei2.bdf
....\......\reexpei2.bsf
....\......\reexpei2.cdf
....\......\reexpei2.done
....\......\reexpei2.fit.eqn
....\......\reexpei2.fit.rpt
....\......\reexpei2.fit.smsg
....\......\reexpei2.fit.summary
....\......\reexpei2.flow.rpt
....\......\reexpei2.map.eqn
....\......\reexpei2.map.rpt
....\......\reexpei2.map.summary
....\......\reexpei2.pin
....\......\reexpei2.pof
....\......\reexpei2.ppl
....\......\reexpei2.qpf
....\......\reexpei2.qsf
....\......\reexpei2.qws
....\......\reexpei2.sim.rpt
....\......\reexpei2.sof
....\......\reexpei2.tan.rpt
....\......\reexpei2.tan.summary
....\......\reexpei2.vwf
....\......\reexpei2_assignment_defaults.qdf
....\......\sopc_builder_debug_log.txt
....\......\stp1.stp
....\......\stp2.stp
....\序列检测器.doc
....\教师联系方式及课程概述.ppt
....\本科大作业（2011-9-5).doc
....\第1章 可编程逻辑器件概述.ppt
....\第2章 可编程逻辑器件的硬件结构.ppt
....\第3章 VHDL语言基础.ppt
....\第4章 VHDL的顺序描述语句.ppt
....\第5章 VHDL的并行语句.ppt
....\第6章 状态机设计.ppt
....\第7章 宏功能模块设计.ppt
....\第8章 设计实例.ppt