Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: counter_seg_code Download
 Description: It is essential for students to learn FPGA to divide the calculator, but it is important to use them together.
 Downloaders recently: [More information of uploader Gent Liu]
 To Search:
File list (Check if you may need any files): 
 

RTL
...\clk_gen.v
...\counter_9999.v
...\counter_seg.v
...\dyn_seg.v

CodeBus www.codebus.net