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Title: spi_slave_lattice Download
 Description: This based on lattice fpga do spi slave module. Easy to understand for beginners. The code using a state machine description. The whole project is run diamond2.0 version of the compiler.
 Downloaders recently: [More information of uploader xie]
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spi_slave
.........\.run_manager.ini
.........\.setting.ini
.........\IP
.........\..\counter_4bits.edn
.........\..\counter_4bits.ipx
.........\..\counter_4bits.lpc
.........\..\counter_4bits.naf
.........\..\counter_4bits.sort
.........\..\counter_4bits.srp
.........\..\counter_4bits.sym
.........\..\counter_4bits.v
.........\..\counter_4bits_generate.log
.........\..\counter_4bits_tmpl.v
.........\..\generate_core.tcl
.........\..\generate_ngd.tcl
.........\..\msg_file.log
.........\..\tb_counter_4bits_tmpl.v
.........\Untitled.tpf
.........\reportview.xml
.........\sim
.........\...\test
.........\...\....\Edfmap.ini
.........\...\....\compilation.order
.........\...\....\compile
.........\...\....\.......\contents.lib~test
.........\...\....\.......\contents.lib~work
.........\...\....\.......\sources.sth
.........\...\....\.......\test.epr
.........\...\....\.......\test.erf
.........\...\....\.......\test.opt
.........\...\....\.......\test.opv
.........\...\....\.......\vcp_cmd.log
.........\...\....\compile.cfg
.........\...\....\library.cfg
.........\...\....\log
.........\...\....\...\console.log
.........\...\....\moduleparser_command.log
.........\...\....\projlib.cfg
.........\...\....\sim_para.tcl
.........\...\....\source_files.lst
.........\...\....\src
.........\...\....\...\wave.asdb
.........\...\....\stimulators.set
.........\...\....\synthesis.order
.........\...\....\test
.........\...\....\....\test.lib
.........\...\....\test.adf
.........\...\....\test.ado
.........\...\....\test.aws
.........\...\....\test.sort
.........\...\....\test.spf
.........\...\....\test.tops
.........\...\....\test.wsp
.........\...\....\work
.........\...\....\....\0work.mgf
.........\...\....\....\1work.mgf
.........\...\....\....\3work.mgf
.........\...\....\....\elaboration.log
.........\...\....\....\slp
.........\...\....\....\...\0.bin
.........\...\....\....\...\0.off
.........\...\....\....\...\2.ff
.........\...\....\....\...\ext.gen
.........\...\....\....\...\logs
.........\...\....\....\...\....\link_err.log
.........\...\....\....\...\....\tmp.log
.........\...\....\....\...\slp_model.dll
.........\...\....\....\...\slp_model.info
.........\...\....\....\...\slp_model2.info
.........\...\....\....\...\spi.gen
.........\...\....\....\work.lib
.........\...\....\....\work.rlb
.........\...\....\....\work_0.rep
.........\spi_slave
.........\.........\.build_status
.........\.........\AutoConstraint_Spi_slave.sdc
.........\.........\Untitled.tpf.prf
.........\.........\Untitled.tpf.prf_cdmp
.........\.........\Untitled.tpf.prf_cdmp0
.........\.........\Untitled.tpf.prf_cdmp2
.........\.........\Untitled.tpf_hold.html
.........\.........\Untitled.tpf_setup.html
.........\.........\automake.log
.........\.........\backup
.........\.........\......\spi_slave.srr
.........\.........\......\spi_slave_spi_slave.srr
.........\.........\coreip
.........\.........\dm
.........\.........\..\spi_slave_comp.xdm
.........\.........\..\spi_slave_spi_slave_comp.xdm
.........\.........\hdla_gen_hierarchy.html
.........\.........\launch_synplify.tcl
.........\.........\message.xml
.........\.........\physical_plus
.........\.........\.............\syntmp
.........\.........\run_options.txt
.........\.........\scratchproject.prs
.........\.........\source
.........\.........\......\counter_4bits.v
    

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