Description: Using Verilog HDL programming language, to achieve the crossroads of traffic lights function, can be simulated in FPGA hardware on (the default hardware crystal is 50MHz).
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File list (Check if you may need any files):
traffic_lights\clk_divisor.v
..............\traffic_lights.v
..............\traffic_lights_top.v
..............\traffic_lights_top_tb.v
traffic_lights
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