Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: fir_csd Download
 Description: vdhl achieve FIR, multiplier using CSD coding, in the case of resource constraints, can save a lot of resources
 Downloaders recently: [More information of uploader wangjin]
 To Search:
File list (Check if you may need any files): 
 

wangjin_fpga_package.vhd
fir_csd.vhd
lineadd.vhd

CodeBus www.codebus.net