Description: Based FPGA, Verilog language DDS signal generator that generates a square wave, sine wave, triangle wave.
To Search:
File list (Check if you may need any files):
DDS
...\DDS
...\...\1024.mif
...\...\512.mif
...\...\DDSFPGA.asm.rpt
...\...\DDSFPGA.bdf
...\...\DDSFPGA.done
...\...\DDSFPGA.fit.eqn
...\...\DDSFPGA.fit.rpt
...\...\DDSFPGA.fit.summary
...\...\DDSFPGA.flow.rpt
...\...\DDSFPGA.map.eqn
...\...\DDSFPGA.map.rpt
...\...\DDSFPGA.map.summary
...\...\DDSFPGA.pin
...\...\DDSFPGA.pof
...\...\DDSFPGA.qpf
...\...\DDSFPGA.qsf
...\...\DDSFPGA.qws
...\...\DDSFPGA.sim.rpt
...\...\DDSFPGA.sof
...\...\DDSFPGA.tan.rpt
...\...\DDSFPGA.tan.summary
...\...\DDSFPGA.vwf
...\...\DDSFPGA_assignment_defaults.qdf
...\...\Key.bsf
...\...\clock_d2.bsf
...\...\clock_d2.v
...\...\cmp_state.ini
...\...\control.bsf
...\...\control.v
...\...\control.v.bak
...\...\creat.c
...\...\creat.exe
...\...\datachoose.bsf
...\...\datachoose.v
...\...\db
...\...\..\DDSFPGA.db_info
...\...\..\DDSFPGA.eco.cdb
...\...\..\DDSFPGA.sld_design_entry.sci
...\...\..\DDSFPGA_cmp.qrpt
...\...\..\DDSFPGA_sim.qrpt
...\...\..\altsyncram_88s.tdf
...\...\key.v
...\...\romlookup.bsf
...\...\romlookup.v
...\...\romlookup_bb.v
...\...\squwave.bsf
...\...\squwave.v
...\...\squwave.v.bak
...\...\triawave.bsf
...\...\triawave.v
...\...\triawave.v.bak
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