Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: cy4ex31 Download
 Description: Based FPGA control DDS waveform generator in Cyclone IV series board on use, has been simulation
 Downloaders recently: [More information of uploader 胡曦文]
 To Search:
File list (Check if you may need any files):
 

cy4ex31\cy4.qpf
.......\cy4.qsf
.......\cy4.qws
.......\cy4_nativelink_simulation.rpt
.......\db\.cmp.kpt
.......\..\add_sub_7lf.tdf
.......\..\add_sub_b6f.tdf
.......\..\add_sub_c6f.tdf
.......\..\add_sub_c7f.tdf
.......\..\add_sub_d7f.tdf
.......\..\add_sub_kif.tdf
.......\..\add_sub_mif.tdf
.......\..\add_sub_nif.tdf
.......\..\add_sub_o7f.tdf
.......\..\add_sub_q7f.tdf
.......\..\add_sub_r8f.tdf
.......\..\add_sub_t7f.tdf
.......\..\altsyncram_epc1.tdf
.......\..\altsyncram_jnc1.tdf
.......\..\altsyncram_me81.tdf
.......\..\cmpr_sgc.tdf
.......\..\cntr_uqf.tdf
.......\..\cy4.ace_cmp.bpm
.......\..\cy4.ace_cmp.cdb
.......\..\cy4.ace_cmp.hdb
.......\..\cy4.asm.qmsg
.......\..\cy4.asm.rdb
.......\..\cy4.asm_labs.ddb
.......\..\cy4.cbx.xml
.......\..\cy4.cmp.bpm
.......\..\cy4.cmp.cdb
.......\..\cy4.cmp.hdb
.......\..\cy4.cmp.idb
.......\..\cy4.cmp.logdb
.......\..\cy4.cmp.rdb
.......\..\cy4.cmp_merge.kpt
.......\..\cy4.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
.......\..\cy4.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
.......\..\cy4.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
.......\..\cy4.db_info
.......\..\cy4.eco.cdb
.......\..\cy4.eda.qmsg
.......\..\cy4.fit.qmsg
.......\..\cy4.hier_info
.......\..\cy4.hif
.......\..\cy4.ipinfo
.......\..\cy4.lpc.html
.......\..\cy4.lpc.rdb
.......\..\cy4.lpc.txt
.......\..\cy4.map.ammdb
.......\..\cy4.map.bpm
.......\..\cy4.map.cdb
.......\..\cy4.map.hdb
.......\..\cy4.map.kpt
.......\..\cy4.map.logdb
.......\..\cy4.map.qmsg
.......\..\cy4.map.rdb
.......\..\cy4.map_bb.cdb
.......\..\cy4.map_bb.hdb
.......\..\cy4.map_bb.logdb
.......\..\cy4.pplq.rdb
.......\..\cy4.pre_map.hdb
.......\..\cy4.pti_db_list.ddb
.......\..\cy4.root_partition.map.reg_db.cdb
.......\..\cy4.routing.rdb
.......\..\cy4.rtlv.hdb
.......\..\cy4.rtlv_sg.cdb
.......\..\cy4.rtlv_sg_swap.cdb
.......\..\cy4.sgdiff.cdb
.......\..\cy4.sgdiff.hdb
.......\..\cy4.sld_design_entry.sci
.......\..\cy4.sld_design_entry_dsc.sci
.......\..\cy4.smart_action.txt
.......\..\cy4.smp_dump.txt
.......\..\cy4.sta.qmsg
.......\..\cy4.sta.rdb
.......\..\cy4.sta_cmp.8_slow_1200mv_85c.tdb
.......\..\cy4.tiscmp.fastest_slow_1200mv_0c.ddb
.......\..\cy4.tiscmp.fastest_slow_1200mv_85c.ddb
.......\..\cy4.tiscmp.fast_1200mv_0c.ddb
.......\..\cy4.tiscmp.slow_1200mv_0c.ddb
.......\..\cy4.tiscmp.slow_1200mv_85c.ddb
.......\..\cy4.tis_db_list.ddb
.......\..\cy4.tmw_info
.......\..\cy4.vpr.ammdb
.......\..\logic_util_heursitic.dat
.......\..\lpm_clshift_e9d.tdf
.......\..\lpm_clshift_qc9.tdf
.......\..\lpm_clshift_vc9.tdf
.......\..\mult_1jo.tdf
.......\..\mult_9qo.tdf
.......\..\mult_iqn.tdf
.......\..\mux_luc.tdf
.......\..\mux_p1d.tdf
.......\..\pll_controller_altpll.v
.......\..\prev_cmp_cy4.qmsg
.......\..\shift_taps_k6m.tdf
.......\greybox_tmp\cbx_args.txt
.......\incremental_db\compiled_partitions\cy4.db_info
.......\..............\...................\cy4.root_partition.cmp.ammdb
    

CodeBus www.codebus.net