- Category:
- Com Port
- Tags:
-
[VHDL]
[源码]
- File Size:
- 3.62mb
- Update:
- 2017-08-28
- Downloads:
- 0 Times
- Uploaded by:
- 付忠伟
Description: Serial entry procedures, the novice thoroughly understand the serial port is very helpful
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File list (Check if you may need any files):
uart\bps_rx.v
uart\bps_tx.v
uart\db\.cmp.kpt
uart\db\altsyncram_st14.tdf
uart\db\cmpr_ngc.tdf
uart\db\cmpr_rgc.tdf
uart\db\cntr_23j.tdf
uart\db\cntr_igi.tdf
uart\db\cntr_o9j.tdf
uart\db\decode_dvf.tdf
uart\db\logic_util_heursitic.dat
uart\db\mux_vsc.tdf
uart\db\prev_cmp_uart.qmsg
uart\db\stp2_auto_stripped.stp
uart\db\uart.1.cmp.rdb
uart\db\uart.2.cmp.rdb
uart\db\uart.asm.qmsg
uart\db\uart.asm.rdb
uart\db\uart.autoh_e40e1.map.reg_db.cdb
uart\db\uart.autoh_e40e1.qmsg
uart\db\uart.autos_3e921.map.reg_db.cdb
uart\db\uart.autos_3e921.qmsg
uart\db\uart.cbx.xml
uart\db\uart.cmp.bpm
uart\db\uart.cmp.cdb
uart\db\uart.cmp.hdb
uart\db\uart.cmp.idb
uart\db\uart.cmp.logdb
uart\db\uart.cmp.rdb
uart\db\uart.cmp_merge.kpt
uart\db\uart.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
uart\db\uart.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
uart\db\uart.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
uart\db\uart.db_info
uart\db\uart.eda.qmsg
uart\db\uart.fit.qmsg
uart\db\uart.hier_info
uart\db\uart.hif
uart\db\uart.ipinfo
uart\db\uart.lpc.html
uart\db\uart.lpc.rdb
uart\db\uart.lpc.txt
uart\db\uart.main.hdb
uart\db\uart.map.ammdb
uart\db\uart.map.bpm
uart\db\uart.map.cdb
uart\db\uart.map.hdb
uart\db\uart.map.kpt
uart\db\uart.map.logdb
uart\db\uart.map.qmsg
uart\db\uart.map.rcfdb
uart\db\uart.map.rdb
uart\db\uart.map_bb.cdb
uart\db\uart.map_bb.hdb
uart\db\uart.map_bb.logdb
uart\db\uart.merge.qmsg
uart\db\uart.npp.qmsg
uart\db\uart.pplq.rdb
uart\db\uart.pre_map.hdb
uart\db\uart.pti_db_list.ddb
uart\db\uart.quartus_db.retry.rcfdb
uart\db\uart.root_partition.map.reg_db.cdb
uart\db\uart.routing.rdb
uart\db\uart.rtlv.hdb
uart\db\uart.rtlv_sg.cdb
uart\db\uart.rtlv_sg_swap.cdb
uart\db\uart.sgate.nvd
uart\db\uart.sgate_sm.nvd
uart\db\uart.sgdiff.cdb
uart\db\uart.sgdiff.hdb
uart\db\uart.sld_design_entry.sci
uart\db\uart.sld_design_entry_dsc.sci
uart\db\uart.smart_action.txt
uart\db\uart.sta.qmsg
uart\db\uart.sta.rdb
uart\db\uart.tis_db_list.ddb
uart\db\uart.vpr.ammdb
uart\incremental_db\compiled_partitions\uart.autoh_e40e1.map.cdb
uart\incremental_db\compiled_partitions\uart.autoh_e40e1.map.dpi
uart\incremental_db\compiled_partitions\uart.autoh_e40e1.map.hdb
uart\incremental_db\compiled_partitions\uart.autoh_e40e1.map.kpt
uart\incremental_db\compiled_partitions\uart.autoh_e40e1.map.logdb
uart\incremental_db\compiled_partitions\uart.autos_3e921.map.cdb
uart\incremental_db\compiled_partitions\uart.autos_3e921.map.dpi
uart\incremental_db\compiled_partitions\uart.autos_3e921.map.hdb
uart\incremental_db\compiled_partitions\uart.autos_3e921.map.kpt
uart\incremental_db\compiled_partitions\uart.autos_3e921.map.logdb
uart\incremental_db\compiled_partitions\uart.db_info
uart\incremental_db\compiled_partitions\uart.root_partition.cmp.ammdb
uart\incremental_db\compiled_partitions\uart.root_partition.cmp.cdb
uart\incremental_db\compiled_partitions\uart.root_partition.cmp.dfp
uart\incremental_db\compiled_partitions\uart.root_partition.cmp.hdb
uart\incremental_db\compiled_partitions\uart.root_partition.cmp.logdb
uart\incremental_db\compiled_partitions\uart.root_partition.cmp.rcfdb
uart\incremental_db\compiled_partitions\uart.root_partition.map.cdb
uart\incremental_db\compiled_partitions\uart.root_partition.map.dpi
uart\incremental_db\compiled_partitions\uart.root_partition.map.hbdb.cdb
uart\incremental_db\compiled_partitions\uart.root_partition.map.hbdb.hb_info
uart\incremental_db\compiled_partitions\uart.root_partition.map.hbdb.hdb
uart\incremental_db\compiled_partitions\uart.root_partition.map.hbdb.sig