Description: Digital tube driver instance, generate a 16bit data increments per second
It is displayed on 4 bit digital tube by 16 Decimal System
To Search:
File list (Check if you may need any files):
digitron\counter.lso
digitron\counter.prj
digitron\counter.stx
digitron\counter.xst
digitron\ipcore_dir\coregen.cgp
digitron\ipcore_dir\coregen.log
digitron\ipcore_dir\create_pll_controller.tcl
digitron\ipcore_dir\pll_controller\clk_wiz_v3_6_readme.txt
digitron\ipcore_dir\pll_controller\doc\clk_wiz_v3_6_readme.txt
digitron\ipcore_dir\pll_controller\doc\clk_wiz_v3_6_vinfo.html
digitron\ipcore_dir\pll_controller\doc\pg065_clk_wiz.pdf
digitron\ipcore_dir\pll_controller\example_design\pll_controller_exdes.ucf
digitron\ipcore_dir\pll_controller\example_design\pll_controller_exdes.v
digitron\ipcore_dir\pll_controller\example_design\pll_controller_exdes.xdc
digitron\ipcore_dir\pll_controller\implement\implement.bat
digitron\ipcore_dir\pll_controller\implement\implement.sh
digitron\ipcore_dir\pll_controller\implement\planAhead_ise.bat
digitron\ipcore_dir\pll_controller\implement\planAhead_ise.sh
digitron\ipcore_dir\pll_controller\implement\planAhead_ise.tcl
digitron\ipcore_dir\pll_controller\implement\planAhead_rdn.bat
digitron\ipcore_dir\pll_controller\implement\planAhead_rdn.sh
digitron\ipcore_dir\pll_controller\implement\planAhead_rdn.tcl
digitron\ipcore_dir\pll_controller\implement\xst.prj
digitron\ipcore_dir\pll_controller\implement\xst.scr
digitron\ipcore_dir\pll_controller\simulation\functional\simcmds.tcl
digitron\ipcore_dir\pll_controller\simulation\functional\simulate_isim.bat
digitron\ipcore_dir\pll_controller\simulation\functional\simulate_isim.sh
digitron\ipcore_dir\pll_controller\simulation\functional\simulate_mti.bat
digitron\ipcore_dir\pll_controller\simulation\functional\simulate_mti.do
digitron\ipcore_dir\pll_controller\simulation\functional\simulate_mti.sh
digitron\ipcore_dir\pll_controller\simulation\functional\simulate_ncsim.sh
digitron\ipcore_dir\pll_controller\simulation\functional\simulate_vcs.sh
digitron\ipcore_dir\pll_controller\simulation\functional\ucli_commands.key
digitron\ipcore_dir\pll_controller\simulation\functional\vcs_session.tcl
digitron\ipcore_dir\pll_controller\simulation\functional\wave.do
digitron\ipcore_dir\pll_controller\simulation\functional\wave.sv
digitron\ipcore_dir\pll_controller\simulation\pll_controller_tb.v
digitron\ipcore_dir\pll_controller\simulation\timing\pll_controller_tb.v
digitron\ipcore_dir\pll_controller\simulation\timing\sdf_cmd_file
digitron\ipcore_dir\pll_controller\simulation\timing\simcmds.tcl
digitron\ipcore_dir\pll_controller\simulation\timing\simulate_isim.sh
digitron\ipcore_dir\pll_controller\simulation\timing\simulate_mti.bat
digitron\ipcore_dir\pll_controller\simulation\timing\simulate_mti.do
digitron\ipcore_dir\pll_controller\simulation\timing\simulate_mti.sh
digitron\ipcore_dir\pll_controller\simulation\timing\simulate_ncsim.sh
digitron\ipcore_dir\pll_controller\simulation\timing\simulate_vcs.sh
digitron\ipcore_dir\pll_controller\simulation\timing\ucli_commands.key
digitron\ipcore_dir\pll_controller\simulation\timing\vcs_session.tcl
digitron\ipcore_dir\pll_controller\simulation\timing\wave.do
digitron\ipcore_dir\pll_controller.asy
digitron\ipcore_dir\pll_controller.gise
digitron\ipcore_dir\pll_controller.ncf
digitron\ipcore_dir\pll_controller.sym
digitron\ipcore_dir\pll_controller.ucf
digitron\ipcore_dir\pll_controller.v
digitron\ipcore_dir\pll_controller.veo
digitron\ipcore_dir\pll_controller.xco
digitron\ipcore_dir\pll_controller.xdc
digitron\ipcore_dir\pll_controller.xise
digitron\ipcore_dir\pll_controller_flist.txt
digitron\ipcore_dir\pll_controller_xmdf.tcl
digitron\ipcore_dir\tmp\customization_gui.0.0535084526304.out
digitron\ipcore_dir\tmp\_xmsgs\pn_parser.xmsgs
digitron\ipcore_dir\_xmsgs\cg.xmsgs
digitron\ipcore_dir\_xmsgs\pn_parser.xmsgs
digitron\iseconfig\sp6.projectmgr
digitron\iseconfig\sp6.xreport
digitron\led_controller.lso
digitron\led_controller.prj
digitron\led_controller.stx
digitron\led_controller.xst
digitron\pa.fromHdl.tcl
digitron\par_usage_statistics.html
digitron\planAhead_pid10348.debug
digitron\planAhead_pid1052.debug
digitron\planAhead_pid8104.debug
digitron\planAhead_pid8904.debug
digitron\planAhead_pid9948.debug
digitron\planAhead_run_1\planAhead.jou
digitron\planAhead_run_1\planAhead.log
digitron\planAhead_run_1\planAhead_run.log
digitron\planAhead_run_1\sp6.data\constrs_1\fileset.xml
digitron\planAhead_run_1\sp6.data\sim_1\fileset.xml
digitron\planAhead_run_1\sp6.data\sources_1\fileset.xml
digitron\planAhead_run_1\sp6.data\wt\project.wpc
digitron\planAhead_run_1\sp6.data\wt\webtalk_pa.xml
digitron\planAhead_run_1\sp6.ppr
digitron\planAhead_run_2\planAhead.jou
digitron\planAhead_run_2\planAhead.log
digitron\planAhead_run_2\planAhead_run.log
digitron\planAhead_run_2\sp6.data\constrs_1\fileset.xml
digitron\planAhead_run_2\sp6.data\sim_1\fileset.xml
digitron\planAhead_run_2\sp6.data\sources_1\fileset.xml
digitron\planAhead_run_2\sp6.data\wt\project.wpc
digitron\planAhead_run_2\sp6.data\wt\webtalk_pa.xml
digitron\planAhead_run_2\sp6.ppr
digitron\planAhead_run_3\planAhead.jou
digitron\planAhead_run_3\planAhead.log
digitron\planAhead_run_3\planAhead_run.log
digitron\planAhead_run_3\sp6.data\constrs_1\fileset.xml